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| author | Matthew Wilcox <matthew.r.wilcox@intel.com> | 2011-02-14 12:20:15 -0500 |
|---|---|---|
| committer | Matthew Wilcox <matthew.r.wilcox@intel.com> | 2011-11-04 15:52:57 -0400 |
| commit | 897cfe1ce7db152fa6dde576f4213a6160bf6502 (patch) | |
| tree | 3a9a5120dd44146322d5c200a6e82a7155d865a6 /include/linux/nvme.h | |
| parent | 768308400f5b4ce665a072eb976a851978b7706e (diff) | |
| download | op-kernel-dev-897cfe1ce7db152fa6dde576f4213a6160bf6502.zip op-kernel-dev-897cfe1ce7db152fa6dde576f4213a6160bf6502.tar.gz | |
NVMe: Update BAR structure to match the current spec
Add two reserved registers in the middle of the BAR to match the 1.0
spec plus ECN 0002.
Also rename IMC and ISC to INTMC and INTSC to conform with the spec.
We still don't need to use them :-)
Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
Diffstat (limited to 'include/linux/nvme.h')
| -rw-r--r-- | include/linux/nvme.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/nvme.h b/include/linux/nvme.h index 8eed0e4..757faa7 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -24,10 +24,12 @@ struct nvme_bar { __u64 cap; /* Controller Capabilities */ __u32 vs; /* Version */ - __u32 ims; /* Interrupt Mask Set */ - __u32 imc; /* Interrupt Mask Clear */ + __u32 intms; /* Interrupt Mask Set */ + __u32 intmc; /* Interrupt Mask Clear */ __u32 cc; /* Controller Configuration */ + __u32 rsvd1; /* Reserved */ __u32 csts; /* Controller Status */ + __u32 rsvd2; /* Reserved */ __u32 aqa; /* Admin Queue Attributes */ __u64 asq; /* Admin SQ Base Address */ __u64 acq; /* Admin CQ Base Address */ |
