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authorChristoph Hellwig <hch@lst.de>2016-06-06 23:20:45 +0200
committerJens Axboe <axboe@fb.com>2016-06-12 07:29:43 -0600
commit69cd27e2511616f9b402d1bad4c49f91aa7411a3 (patch)
tree5abaa944a77a51e0b50e151e385d5bc96c3c6e54 /include/linux/nvme.h
parent725b358836ed038d7d8eafef86330b3a0b3f9c2f (diff)
downloadop-kernel-dev-69cd27e2511616f9b402d1bad4c49f91aa7411a3.zip
op-kernel-dev-69cd27e2511616f9b402d1bad4c49f91aa7411a3.tar.gz
nvme.h: add NVM command set SQE/CQE size defines
Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Jens Axboe <axboe@fb.com>
Diffstat (limited to 'include/linux/nvme.h')
-rw-r--r--include/linux/nvme.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 9925b85..9807d98 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -50,6 +50,13 @@ enum {
#define NVME_CMB_CQS(cmbsz) ((cmbsz) & 0x2)
#define NVME_CMB_SQS(cmbsz) ((cmbsz) & 0x1)
+/*
+ * Submission and Completion Queue Entry Sizes for the NVM command set.
+ * (In bytes and specified as a power of two (2^n)).
+ */
+#define NVME_NVM_IOSQES 6
+#define NVME_NVM_IOCQES 4
+
enum {
NVME_CC_ENABLE = 1 << 0,
NVME_CC_CSS_NVM = 0 << 4,
@@ -61,8 +68,8 @@ enum {
NVME_CC_SHN_NORMAL = 1 << 14,
NVME_CC_SHN_ABRUPT = 2 << 14,
NVME_CC_SHN_MASK = 3 << 14,
- NVME_CC_IOSQES = 6 << 16,
- NVME_CC_IOCQES = 4 << 20,
+ NVME_CC_IOSQES = NVME_NVM_IOSQES << 16,
+ NVME_CC_IOCQES = NVME_NVM_IOCQES << 20,
NVME_CSTS_RDY = 1 << 0,
NVME_CSTS_CFS = 1 << 1,
NVME_CSTS_NSSRO = 1 << 4,
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