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authorBrian Norris <computersforpeace@gmail.com>2014-01-29 14:08:12 -0800
committerBrian Norris <computersforpeace@gmail.com>2014-03-10 22:42:22 -0700
commit3dad2344e92c6e1aeae42df1c4824f307c51bcc7 (patch)
treeca71a7005c582cd98eebf5e16049b125564925f5 /include/linux/mtd
parent55e571bd0707fb6516d0e38598c9e51683e03ee9 (diff)
downloadop-kernel-dev-3dad2344e92c6e1aeae42df1c4824f307c51bcc7.zip
op-kernel-dev-3dad2344e92c6e1aeae42df1c4824f307c51bcc7.tar.gz
mtd: nand: force NAND_CMD_READID onto 8-bit bus
The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: Pekon Gupta <pekon@ti.com>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/nand.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index a719686..c034dc4 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -832,4 +832,14 @@ static inline bool nand_is_slc(struct nand_chip *chip)
{
return chip->bits_per_cell == 1;
}
+
+/**
+ * Check if the opcode's address should be sent only on the lower 8 bits
+ * @command: opcode to check
+ */
+static inline int nand_opcode_8bits(unsigned int command)
+{
+ return command == NAND_CMD_READID;
+}
+
#endif /* __LINUX_MTD_NAND_H */
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