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authorYijing Wang <wangyijing@huawei.com>2014-06-19 16:30:30 +0800
committerBjorn Helgaas <bhelgaas@google.com>2014-07-03 16:55:07 -0600
commit31ea5d4dfe21fb50276dcd70ce268e58d57eccb4 (patch)
treee8831d2a1ea82d5b70f19044ade5f56746d92580 /include/linux/msi.h
parent199596ef9184ab2bc0eb43d1af9e0b723ce07840 (diff)
downloadop-kernel-dev-31ea5d4dfe21fb50276dcd70ce268e58d57eccb4.zip
op-kernel-dev-31ea5d4dfe21fb50276dcd70ce268e58d57eccb4.tar.gz
PCI/MSI: Cache Multiple Message Capable in struct msi_desc
The Multiple Message Capable field in the MSI Message Control register indicates how many vectors the device supports. This field is read-only, so cache it in msi_desc to avoid reading it repeatedly. Since we cache the extracted field (not the entire Message Control register), we can use msi_mask() instead of msi_capable_mask(), which is then unused, so remove it. [bhelgaas: fix whitespace, changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/msi.h')
-rw-r--r--include/linux/msi.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 92a2f99..8103f32 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -25,7 +25,8 @@ void write_msi_msg(unsigned int irq, struct msi_msg *msg);
struct msi_desc {
struct {
__u8 is_msix : 1;
- __u8 multiple: 3; /* log2 number of messages */
+ __u8 multiple: 3; /* log2 num of messages allocated */
+ __u8 multi_cap : 3; /* log2 num of messages supported */
__u8 maskbit : 1; /* mask-pending bit supported ? */
__u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
__u8 pos; /* Location of the msi capability */
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