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authorYong Ding <yongd@marvell.com>2012-05-15 13:09:43 +0800
committerChris Ball <cjb@laptop.org>2012-06-06 09:22:53 -0400
commit2a0fe914a38745f5b03534c4e4f4056cbd6978b8 (patch)
treeb341420c0fc9a3eaf0c62a431d495ff67742e5a0 /include/linux/mmc
parent693e5e2025278d90e1427f037e5ec8ea1ec7d5c4 (diff)
downloadop-kernel-dev-2a0fe914a38745f5b03534c4e4f4056cbd6978b8.zip
op-kernel-dev-2a0fe914a38745f5b03534c4e4f4056cbd6978b8.tar.gz
mmc: sdio: fix setting card data bus width as 4-bit
SDIO_CCCR_IF[1:0] in SDIO card is used for card data bus width setting as below: 00b: 1-bit bus 01b: Reserved 10b: 4-bit bus 11b: 8-bit bus (only for embedded SDIO) And sdio_enable_wide is for setting data bus width as 4-bit. But currently, it first reads the register, second OR' 1b with SDIO_CCCR_IF[1], and then writes it back. As we can see, this is based on such assumption that the SDIO_CCCR_IF[0] is always 0. Apparently, this is not right. Signed-off-by: Yong Ding <yongd@marvell.com> Acked-by: Philip Rakity <prakity@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/sdio.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h
index c9fe66c..17446d3 100644
--- a/include/linux/mmc/sdio.h
+++ b/include/linux/mmc/sdio.h
@@ -98,7 +98,9 @@
#define SDIO_CCCR_IF 0x07 /* bus interface controls */
+#define SDIO_BUS_WIDTH_MASK 0x03 /* data bus width setting */
#define SDIO_BUS_WIDTH_1BIT 0x00
+#define SDIO_BUS_WIDTH_RESERVED 0x01
#define SDIO_BUS_WIDTH_4BIT 0x02
#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */
#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */
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