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authorErez Shitrit <erezsh@mellanox.com>2016-02-21 16:27:16 +0200
committerDoug Ledford <dledford@redhat.com>2016-03-01 10:57:15 -0500
commit1015c2e8ca2b94d8964f8ab30d925b6f678fd9d2 (patch)
treead4df0940a38151b6fc38fa2d79d79698cc87285 /include/linux/mlx5/mlx5_ifc.h
parent3efd9a11212d500e36c2837db853178cdaa86d5a (diff)
downloadop-kernel-dev-1015c2e8ca2b94d8964f8ab30d925b6f678fd9d2.zip
op-kernel-dev-1015c2e8ca2b94d8964f8ab30d925b6f678fd9d2.tar.gz
IB/mlx5: Define interface bits for IPoIB offloads
The HW can supply several offloads for UD QP, added offloads for checksumming for both TX and RX and LSO for TX. Two new bits were added in order to expose and enable these offloads: 1. HCA capability bit: declares the support for IPoIB basic offloads. 2. QPC bit which will be used in the QP creation flow, which set these abilities in the QP. Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
-rw-r--r--include/linux/mlx5/mlx5_ifc.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 9f404de..711c9dc 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -736,7 +736,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 cqe_version[0x4];
u8 compact_address_vector[0x1];
- u8 reserved_at_200[0xe];
+ u8 reserved_at_200[0x3];
+ u8 ipoib_basic_offloads[0x1];
+ u8 reserved_at_204[0xa];
u8 drain_sigerr[0x1];
u8 cmdif_checksum[0x2];
u8 sigerr_cqe[0x1];
@@ -1810,7 +1812,7 @@ struct mlx5_ifc_qpc_bits {
u8 log_sq_size[0x4];
u8 reserved_at_55[0x6];
u8 rlky[0x1];
- u8 reserved_at_5c[0x4];
+ u8 ulp_stateless_offload_mode[0x4];
u8 counter_set_id[0x8];
u8 uar_page[0x18];
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