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| author | Quentin Schulz <quentin.schulz@free-electrons.com> | 2017-04-05 11:06:30 +0200 |
|---|---|---|
| committer | Jonathan Cameron <jic23@kernel.org> | 2017-04-08 17:35:47 +0100 |
| commit | 808a8b73772c6ac7d999c0508d2f757831cd83ca (patch) | |
| tree | a7ba3dbbec23f715395c8c192abab1c55ee6a9e3 /include/linux/mfd | |
| parent | e3f6e7263b823c9a43ec5a24be68adad54897666 (diff) | |
| download | op-kernel-dev-808a8b73772c6ac7d999c0508d2f757831cd83ca.zip op-kernel-dev-808a8b73772c6ac7d999c0508d2f757831cd83ca.tar.gz | |
iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor
This adds support for the Allwinner A33 thermal sensor.
Unlike the A10, A13 and A31, the Allwinner A33 only has one channel
which is dedicated to the thermal sensor. Moreover, its thermal sensor
does not generate interruptions, thus we only need to directly read the
register storing the temperature value.
The MFD used by the A10, A13 and A31, was created to avoid breaking the
DT binding, but since the nodes for the ADC weren't there for the A33,
it is not needed.
Though the A33 does not have an internal ADC, it has a thermal sensor
which shares the same registers with GPADC of the already supported SoCs
and almost the same bits, for the same purpose (thermal sensor).
The thermal sensor behaves exactly the same (except the presence of
interrupts or not) on the different SoCs.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/sun4i-gpadc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h index 509e736..139872c 100644 --- a/include/linux/mfd/sun4i-gpadc.h +++ b/include/linux/mfd/sun4i-gpadc.h @@ -38,6 +38,10 @@ #define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) #define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0) +/* TP_CTRL1 bits for sun8i SoCs */ +#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8) +#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7) + #define SUN4I_GPADC_CTRL2 0x08 #define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28) |
