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authorMark Brown <broonie@opensource.wolfsonmicro.com>2010-02-17 18:45:25 +0000
committerSamuel Ortiz <sameo@linux.intel.com>2010-03-07 22:17:29 +0100
commitf92e8f8144243a3651b2e350b706ea2d04931f8c (patch)
treee008f4b0896cdeb2fb354a1e1babd2a568172498 /include/linux/mfd
parent6b8274fafeec9b112cee5b6ced5f9189957c889f (diff)
downloadop-kernel-dev-f92e8f8144243a3651b2e350b706ea2d04931f8c.zip
op-kernel-dev-f92e8f8144243a3651b2e350b706ea2d04931f8c.tar.gz
mfd: Add WM831x revision B support
Revision B of the WM831x devices changes the sense of the tristate bit for GPIO configuration, inverting it to become an enable instead. Take account of this in the gpiolib driver. A current sink regulation status bit has also been added in revision B, add a flag indicating if it's present but don't use it yet. This revision also adds an interrupt on key up for the ON pin event which the existing code is able to take advantage of. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/wm831x/core.h4
-rw-r--r--include/linux/mfd/wm831x/gpio.h4
2 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h
index 5184b79..53580b5 100644
--- a/include/linux/mfd/wm831x/core.h
+++ b/include/linux/mfd/wm831x/core.h
@@ -254,6 +254,10 @@ struct wm831x {
int irq_masks_cur[WM831X_NUM_IRQ_REGS]; /* Currently active value */
int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */
+ /* Chip revision based flags */
+ unsigned has_gpio_ena:1; /* Has GPIO enable bit */
+ unsigned has_cs_sts:1; /* Has current sink status bit */
+
int num_gpio;
struct mutex auxadc_lock;
diff --git a/include/linux/mfd/wm831x/gpio.h b/include/linux/mfd/wm831x/gpio.h
index 2835614..9b163c5 100644
--- a/include/linux/mfd/wm831x/gpio.h
+++ b/include/linux/mfd/wm831x/gpio.h
@@ -41,6 +41,10 @@
#define WM831X_GPN_OD_MASK 0x0200 /* GPN_OD */
#define WM831X_GPN_OD_SHIFT 9 /* GPN_OD */
#define WM831X_GPN_OD_WIDTH 1 /* GPN_OD */
+#define WM831X_GPN_ENA 0x0080 /* GPN_ENA */
+#define WM831X_GPN_ENA_MASK 0x0080 /* GPN_ENA */
+#define WM831X_GPN_ENA_SHIFT 7 /* GPN_ENA */
+#define WM831X_GPN_ENA_WIDTH 1 /* GPN_ENA */
#define WM831X_GPN_TRI 0x0080 /* GPN_TRI */
#define WM831X_GPN_TRI_MASK 0x0080 /* GPN_TRI */
#define WM831X_GPN_TRI_SHIFT 7 /* GPN_TRI */
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