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authorMicky Ching <micky_ching@realsil.com.cn>2015-02-25 13:50:13 +0800
committerLee Jones <lee.jones@linaro.org>2015-03-03 16:41:19 +0000
commit19f3bd548f2750a8a7e4e6d2f25fdc5f8e2c3ee9 (patch)
tree6eeb54b69860e8150f5a46cca024778198a973c5 /include/linux/mfd/rtsx_pci.h
parentb038538104d5b033d3beaffba6d6efe01246930b (diff)
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mfd: rtsx: Remove LCTLR defination
To enable/disable ASPM we should find LINK CONTROL register in PCI config space. All old chip use 0x80 address, but new chip may use another address, so we using pci_find_capability() to get LINK CONTROL address. rtsx_gops.c was removed, we consider to put some common operations to this file, but the actual thing is, only a group of chips are in common ops1, and another group of chips in common ops2, it is hard to decide put which ops into generic ops file. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd/rtsx_pci.h')
-rw-r--r--include/linux/mfd/rtsx_pci.h10
1 files changed, 1 insertions, 9 deletions
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 0103210..33cc63c 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -716,15 +716,6 @@
#define PHY_DUM_REG 0x1F
-#define LCTLR 0x80
-#define LCTLR_EXT_SYNC 0x80
-#define LCTLR_COMMON_CLOCK_CFG 0x40
-#define LCTLR_RETRAIN_LINK 0x20
-#define LCTLR_LINK_DISABLE 0x10
-#define LCTLR_RCB 0x08
-#define LCTLR_RESERVED 0x04
-#define LCTLR_ASPM_CTL_MASK 0x03
-
#define PCR_SETTING_REG1 0x724
#define PCR_SETTING_REG2 0x814
#define PCR_SETTING_REG3 0x747
@@ -759,6 +750,7 @@ enum PDEV_STAT {PDEV_STAT_IDLE, PDEV_STAT_RUN};
struct rtsx_pcr {
struct pci_dev *pci;
unsigned int id;
+ int pcie_cap;
/* pci resources */
unsigned long addr;
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