summaryrefslogtreecommitdiffstats
path: root/include/linux/i2c
diff options
context:
space:
mode:
authorPeter Ujfalusi <peter.ujfalusi@ti.com>2014-01-03 15:27:47 +0200
committerLee Jones <lee.jones@linaro.org>2014-01-08 11:37:39 +0000
commit3def927ea8c0a1983aa9f1499645efc53e005bb6 (patch)
tree435f2ead61cc9258fbf389603510781cc9da9275 /include/linux/i2c
parent8daf3540659c22b4d3530512a3695728482ec23f (diff)
downloadop-kernel-dev-3def927ea8c0a1983aa9f1499645efc53e005bb6.zip
op-kernel-dev-3def927ea8c0a1983aa9f1499645efc53e005bb6.tar.gz
mfd: twl-core: API to set the regcache bypass for a given regmap in twl
If the regcache is enabled on the regmap module drivers might need to access to HW register(s) in certain cases in cache bypass mode. As an example of this is the audio block's ANAMICL register. In normal operation the content can be cached but during initialization one bit from the register need to be monitored. With the twl_set_regcache_bypass() the client driver can switch regcache bypass on and off when it is needed so we can utilize the regcache for more registers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/i2c')
-rw-r--r--include/linux/i2c/twl.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 673a3ce..a09da09 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -175,6 +175,9 @@ static inline int twl_class_is_ ##class(void) \
TWL_CLASS_IS(4030, TWL4030_CLASS_ID)
TWL_CLASS_IS(6030, TWL6030_CLASS_ID)
+/* Set the regcache bypass for the regmap associated with the nodule */
+int twl_set_regcache_bypass(u8 mod_no, bool enable);
+
/*
* Read and write several 8-bit registers at once.
*/
OpenPOWER on IntegriCloud