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authorViresh Kumar <viresh.kumar@st.com>2012-04-17 16:45:35 +0530
committerMike Turquette <mturquette@linaro.org>2012-04-24 16:37:40 -0700
commit1f73f31ad6e37df0679f6842b7405d96515ec8b1 (patch)
treed5a29e66a6025aec943f6cb5357522d6e6c1d4e9 /include/linux/clk-provider.h
parentf4d8af2e5ae6294d5e2220d3963def6f7ffc0873 (diff)
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clk: Fix typo in comment
CLK_MUX_INDEX_BIT is mistakenly written as CLK_MUX_INDEX_BITWISE in comment. Fix it. CLK_GATE_SET_TO_DISABLE is mistakenly written as CLK_GATE_SET_DISABLE in comment. Fix it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/linux/clk-provider.h')
-rw-r--r--include/linux/clk-provider.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index cb82918..8f21489 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -159,7 +159,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
* Clock which can gate its output. Implements .enable & .disable
*
* Flags:
- * CLK_GATE_SET_DISABLE - by default this clock sets the bit at bit_idx to
+ * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
* enable the clock. Setting this flag does the opposite: setting the bit
* disable the clock and clearing it enables the clock
*/
@@ -232,7 +232,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
*
* Flags:
* CLK_MUX_INDEX_ONE - register index starts at 1, not 0
- * CLK_MUX_INDEX_BITWISE - register index is a single bit (power of two)
+ * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
*/
struct clk_mux {
struct clk_hw hw;
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