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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-11-16 17:40:57 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-13 19:59:48 -0800 |
| commit | 7ec758718920e5e5876d0d02ece6855128c8eb1e (patch) | |
| tree | ecdc049d7a296b75b1fe7f0da731bf8c875fc8c4 /include/linux/amba | |
| parent | 84c3e03bdd1146191b7222ed62a08512199a45c7 (diff) | |
| download | op-kernel-dev-7ec758718920e5e5876d0d02ece6855128c8eb1e.zip op-kernel-dev-7ec758718920e5e5876d0d02ece6855128c8eb1e.tar.gz | |
tty: amba-pl011: add support for ZTE UART (EXPERIMENTAL)
Add (incomplete) support for the ZTE UART to the AMBA PL011 driver.
This is similar to the ARM and ST variants, except it has a different
register address layout, and requires 32-bit accesses to the registers.
Use the newly introduced register tables and access size support to
cope with these differences.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/amba')
| -rw-r--r-- | include/linux/amba/serial.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h index 0ddb5c0..d76a19b 100644 --- a/include/linux/amba/serial.h +++ b/include/linux/amba/serial.h @@ -65,6 +65,24 @@ #define ST_UART011_ABCR 0x100 /* Autobaud control register. */ #define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */ +/* + * ZTE UART register offsets. This UART has a radically different address + * allocation from the ARM and ST variants, so we list all registers here. + * We assume unlisted registers do not exist. + */ +#define ZX_UART011_DR 0x04 +#define ZX_UART011_FR 0x14 +#define ZX_UART011_IBRD 0x24 +#define ZX_UART011_FBRD 0x28 +#define ZX_UART011_LCRH 0x30 +#define ZX_UART011_CR 0x34 +#define ZX_UART011_IFLS 0x38 +#define ZX_UART011_IMSC 0x40 +#define ZX_UART011_RIS 0x44 +#define ZX_UART011_MIS 0x48 +#define ZX_UART011_ICR 0x4c +#define ZX_UART011_DMACR 0x50 + #define UART011_DR_OE (1 << 11) #define UART011_DR_BE (1 << 10) #define UART011_DR_PE (1 << 9) |
