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authorOlof Johansson <olof@lixom.net>2013-12-26 11:03:50 -0800
committerOlof Johansson <olof@lixom.net>2013-12-26 11:03:50 -0800
commit5aceaab3974b64800355500189c66ea6feb88214 (patch)
tree9b85034e1709de1c0a7bfb9d24f89a9f23c5f8f4 /include/dt-bindings
parent770039fef4887d22b12525b62cc4ade1ca724173 (diff)
parent9f1ac5606a008f4849208ebfe818f979619dced0 (diff)
downloadop-kernel-dev-5aceaab3974b64800355500189c66ea6feb88214.zip
op-kernel-dev-5aceaab3974b64800355500189c66ea6feb88214.tar.gz
Merge tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
From Stephen Warren: ARM: tegra: device tree changes This branch contains all the changes to Tegra's device tree. The highlights are: * Many patches for Tegra124 SoC support, and the Venice2 board which uses that SoC. * Conversion to use more headers providing named constants for pinctrl and key codes, which improves readability. * A few cleanups. This branch is based on tag tegra-for-3.14-dmas-resets-rework in order to avoid conflicts with the DT changes required to use the common bindings for DMAs and resets. * tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits) ARM: tegra: Add SPI controller nodes for Tegra124 ARM: tegra: Fix misconfiguration of pin PH2 on Venice2 ARM: tegra: fix pinctrl misconfiguration on Venice2 ARM: tegra: add default pinctrl nodes for Venice2 ARM: tegra: correct Colibri T20 regulator settings ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines ARM: tegra: Add header file for pinctrl constants ARM: tegra: convert device tree files to use key defines ARM: tegra: Enable PWM on Venice2 ARM: tegra: Add Tegra124 PWM support ARM: tegra: add sound card to Venice2 DT ARM: tegra: add audio-related device to Tegra124 DT ARM: tegra: enable I2C controllers on Venice2 ARM: tegra: add I2C controllers to Tegra124 DT ARM: tegra: add MMC controllers to Tegra124 DT ARM: tegra: add Tegra124 pinmux node to DT ARM: tegra: add APB DMA controller to Tegra124 DT ARM: tegra: add reset properties to Tegra124 DTs ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/gpio/tegra-gpio.h1
-rw-r--r--include/dt-bindings/pinctrl/pinctrl-tegra.h45
2 files changed, 46 insertions, 0 deletions
diff --git a/include/dt-bindings/gpio/tegra-gpio.h b/include/dt-bindings/gpio/tegra-gpio.h
index 4d179c0..197dc28 100644
--- a/include/dt-bindings/gpio/tegra-gpio.h
+++ b/include/dt-bindings/gpio/tegra-gpio.h
@@ -43,6 +43,7 @@
#define TEGRA_GPIO_BANK_ID_CC 28
#define TEGRA_GPIO_BANK_ID_DD 29
#define TEGRA_GPIO_BANK_ID_EE 30
+#define TEGRA_GPIO_BANK_ID_FF 31
#define TEGRA_GPIO(bank, offset) \
((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h
new file mode 100644
index 0000000..ebafa49
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pinctrl-tegra.h
@@ -0,0 +1,45 @@
+/*
+ * This header provides constants for Tegra pinctrl bindings.
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
+#define _DT_BINDINGS_PINCTRL_TEGRA_H
+
+/*
+ * Enable/disable for diffeent dt properties. This is applicable for
+ * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
+ * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
+ */
+#define TEGRA_PIN_DISABLE 0
+#define TEGRA_PIN_ENABLE 1
+
+#define TEGRA_PIN_PULL_NONE 0
+#define TEGRA_PIN_PULL_DOWN 1
+#define TEGRA_PIN_PULL_UP 2
+
+/* Low power mode driver */
+#define TEGRA_PIN_LP_DRIVE_DIV_8 0
+#define TEGRA_PIN_LP_DRIVE_DIV_4 1
+#define TEGRA_PIN_LP_DRIVE_DIV_2 2
+#define TEGRA_PIN_LP_DRIVE_DIV_1 3
+
+/* Rising/Falling slew rate */
+#define TEGRA_PIN_SLEW_RATE_FASTEST 0
+#define TEGRA_PIN_SLEW_RATE_FAST 1
+#define TEGRA_PIN_SLEW_RATE_SLOW 2
+#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
+
+#endif
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