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| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2014-04-15 18:30:20 +0200 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-05-14 19:40:14 +0200 |
| commit | 04bc7d96fbbbd7c379a8351db9f2466b47c74ec2 (patch) | |
| tree | c0f34f4a5699bc99df33b6ba6fe56d5d372b4fab /include/dt-bindings | |
| parent | 42fb57c008406ab667bcc6e3164cee092c6f35e7 (diff) | |
| download | op-kernel-dev-04bc7d96fbbbd7c379a8351db9f2466b47c74ec2.zip op-kernel-dev-04bc7d96fbbbd7c379a8351db9f2466b47c74ec2.tar.gz | |
clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and
replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA
has correct clock assigned on Exynos4x12 SoCs.
Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/exynos4.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index 75aff33..3ff13bc 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -181,7 +181,6 @@ #define CLK_KEYIF 347 #define CLK_AUDSS 348 #define CLK_MIPI_HSI 349 /* Exynos4210 only */ -#define CLK_MDMA2 350 /* Exynos4210 only */ #define CLK_PIXELASYNCM0 351 #define CLK_PIXELASYNCM1 352 #define CLK_FIMC_LITE0 353 /* Exynos4x12 only */ |
