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| author | Marek Roszko <mark.roszko@gmail.com> | 2014-08-23 23:12:04 -0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-09-05 10:32:06 +0200 |
| commit | 4334ac2db2be9e278c95fd15260c1f49f698ffc5 (patch) | |
| tree | b6e13a3fda5d1c41495b697abfb0c0a31eff52c3 /include/dt-bindings/pinctrl | |
| parent | 0d37899363b0e5486f8800231b7edd75e8b60942 (diff) | |
| download | op-kernel-dev-4334ac2db2be9e278c95fd15260c1f49f698ffc5.zip op-kernel-dev-4334ac2db2be9e278c95fd15260c1f49f698ffc5.tar.gz | |
pinctrl: at91: add drive strength configuration
The SAMA5 and SAM9x5 series both have drive strength
options for the PIOs. This patch adds the ability to set
one of three hardware options for drive strengths of low,
medium or high for the each pin. The actual current output
of the chip based on the setting is defined in the datasheets
and varies per pins separate from banks and with supply
voltage.
This patch adds three new dt-bindings that allow setting the
strength when configuring pins. By default, no change will
be made to the drive strength of a pin from its reset value.
Due to the difference between the register addresses of the
SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added.
Signed-off-by: Marek Roszko <mark.roszko@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/dt-bindings/pinctrl')
| -rw-r--r-- | include/dt-bindings/pinctrl/at91.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h index 0fee6ff..bbca3d0 100644 --- a/include/dt-bindings/pinctrl/at91.h +++ b/include/dt-bindings/pinctrl/at91.h @@ -20,6 +20,11 @@ #define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH) +#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5) + #define AT91_PIOA 0 #define AT91_PIOB 1 #define AT91_PIOC 2 |
