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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-11 16:58:42 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-08-16 09:51:46 +0200 |
commit | 714c53aa2e2d6d60ca1e7d18980767c8b715c288 (patch) | |
tree | 8756d59ec162511fcadce5b02ec309fd5486d204 /include/dt-bindings/leds | |
parent | 2d6f25774332ebf6a0283d5bc558b273991797db (diff) | |
download | op-kernel-dev-714c53aa2e2d6d60ca1e7d18980767c8b715c288.zip op-kernel-dev-714c53aa2e2d6d60ca1e7d18980767c8b715c288.tar.gz |
clk: renesas: Add r8a77995 CPG Core Clock Definitions
Add all R-Car D3 Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2f ("List of Clocks [R-Car D3]") of the R-Car Series, 3rd
Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017).
Note that internal CPG clocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and
SSPSRC) are not included, as they are used as internal clock sources
only, and never referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/dt-bindings/leds')
0 files changed, 0 insertions, 0 deletions