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authorTomasz Stanislawski <t.stanislaws@samsung.com>2014-04-04 16:53:19 +0200
committerTomasz Figa <t.figa@samsung.com>2014-05-14 19:40:15 +0200
commita5b219b40c463ff162368c7a1dc93387054c79f5 (patch)
tree8315e76300b0282e96e48b6b1434712804ceb4a5 /include/dt-bindings/clock
parent20b82ae27e89739ed8740323913d58efe593ef91 (diff)
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clk: samsung: exynos4: export sclk_hdmiphy clock
Export sclk_hdmiphy clock to be usable from DT. Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/exynos4.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index 3ff13bc..1106ca5 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -33,6 +33,7 @@
#define CLK_MOUT_MPLL_USER_C 18 /* Exynos4x12 only */
#define CLK_MOUT_CORE 19
#define CLK_MOUT_APLL 20
+#define CLK_SCLK_HDMIPHY 22
/* gate for special clocks (sclk) */
#define CLK_SCLK_FIMC0 128
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