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| author | Abhilash Kesavan <a.kesavan@samsung.com> | 2014-10-28 16:48:55 +0530 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2014-10-31 10:45:54 +0100 |
| commit | 932e98224d5602be17ed61d0e057e9326f12b59d (patch) | |
| tree | 70aca870f3702329c26701766c955cfd5c212fc4 /include/dt-bindings/clock | |
| parent | 2ab2dfe5d4eef6bad8cdd90dc6bba5a7660273d4 (diff) | |
| download | op-kernel-dev-932e98224d5602be17ed61d0e057e9326f12b59d.zip op-kernel-dev-932e98224d5602be17ed61d0e057e9326f12b59d.tar.gz | |
clk: samsung: exynos7: add gate clock for ADC block
Add clock support for the ADC interface in Exynos7.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/exynos7-clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index f255bb7..8e4681b 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -55,7 +55,8 @@ #define PCLK_HSI2C11 9 #define PCLK_PWM 10 #define SCLK_PWM 11 -#define PERIC0_NR_CLK 12 +#define PCLK_ADCIF 12 +#define PERIC0_NR_CLK 13 /* PERIC1 */ #define PCLK_UART1 1 |
