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author | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-01 17:30:36 -0800 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-02 14:31:47 -0800 |
commit | 5788923b270c9e0a59ff6a2b3d6e45a4defa1017 (patch) | |
tree | 693550aa699a4f3b5967ecff69e3b1a941306d3f /include/dt-bindings/clock | |
parent | 06a9852747b72c8b3fb35a60cc0498784135b5d8 (diff) | |
parent | f6c3aec2f7a218abec9e5c00353abc02224be49e (diff) | |
download | op-kernel-dev-5788923b270c9e0a59ff6a2b3d6e45a4defa1017.zip op-kernel-dev-5788923b270c9e0a59ff6a2b3d6e45a4defa1017.tar.gz |
Merge tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX clk updates from Shawn Guo:
The i.MX clock update for 4.6:
- Add the clock driver support for the latest i.MX6 family SoCs
addition - i.MX6QP.
- Clean up the whitespace in i.MX6UL clock driver and add the missing
KPP clock.
- Correct pwm7 clock name in i.MX6UL clock driver.
* tag 'imx-clk-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: add kpp clock for i.MX6UL
clk: imx: whitespace cleanup; no functional change
clk: imx: correct pwm7 clock name in driver for i.MX6UL
clk: imx: Add clock support for imx6qp
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r-- | include/dt-bindings/clock/imx6qdl-clock.h | 16 | ||||
-rw-r--r-- | include/dt-bindings/clock/imx6ul-clock.h | 149 |
2 files changed, 90 insertions, 75 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index 77985cc..2905033 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -255,6 +255,20 @@ #define IMX6QDL_CLK_CAAM_ACLK 242 #define IMX6QDL_CLK_CAAM_IPG 243 #define IMX6QDL_CLK_SPDIF_GCLK 244 -#define IMX6QDL_CLK_END 245 +#define IMX6QDL_CLK_UART_SEL 245 +#define IMX6QDL_CLK_IPG_PER_SEL 246 +#define IMX6QDL_CLK_ECSPI_SEL 247 +#define IMX6QDL_CLK_CAN_SEL 248 +#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 249 +#define IMX6QDL_CLK_PRE0 250 +#define IMX6QDL_CLK_PRE1 251 +#define IMX6QDL_CLK_PRE2 252 +#define IMX6QDL_CLK_PRE3 253 +#define IMX6QDL_CLK_PRG0_AXI 254 +#define IMX6QDL_CLK_PRG1_AXI 255 +#define IMX6QDL_CLK_PRG0_APB 256 +#define IMX6QDL_CLK_PRG1_APB 257 +#define IMX6QDL_CLK_PRE_AXI 258 +#define IMX6QDL_CLK_END 259 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h index c343894..fd8aee8 100644 --- a/include/dt-bindings/clock/imx6ul-clock.h +++ b/include/dt-bindings/clock/imx6ul-clock.h @@ -21,13 +21,13 @@ #define IMX6UL_PLL5_BYPASS_SRC 8 #define IMX6UL_PLL6_BYPASS_SRC 9 #define IMX6UL_PLL7_BYPASS_SRC 10 -#define IMX6UL_CLK_PLL1 11 -#define IMX6UL_CLK_PLL2 12 -#define IMX6UL_CLK_PLL3 13 -#define IMX6UL_CLK_PLL4 14 -#define IMX6UL_CLK_PLL5 15 -#define IMX6UL_CLK_PLL6 16 -#define IMX6UL_CLK_PLL7 17 +#define IMX6UL_CLK_PLL1 11 +#define IMX6UL_CLK_PLL2 12 +#define IMX6UL_CLK_PLL3 13 +#define IMX6UL_CLK_PLL4 14 +#define IMX6UL_CLK_PLL5 15 +#define IMX6UL_CLK_PLL6 16 +#define IMX6UL_CLK_PLL7 17 #define IMX6UL_PLL1_BYPASS 18 #define IMX6UL_PLL2_BYPASS 19 #define IMX6UL_PLL3_BYPASS 20 @@ -37,7 +37,7 @@ #define IMX6UL_PLL7_BYPASS 24 #define IMX6UL_CLK_PLL1_SYS 25 #define IMX6UL_CLK_PLL2_BUS 26 -#define IMX6UL_CLK_PLL3_USB_OTG 27 +#define IMX6UL_CLK_PLL3_USB_OTG 27 #define IMX6UL_CLK_PLL4_AUDIO 28 #define IMX6UL_CLK_PLL5_VIDEO 29 #define IMX6UL_CLK_PLL6_ENET 30 @@ -66,7 +66,7 @@ #define IMX6UL_CLK_PLL2_198M 53 #define IMX6UL_CLK_PLL3_80M 54 #define IMX6UL_CLK_PLL3_60M 55 -#define IMX6UL_CLK_STEP 56 +#define IMX6UL_CLK_STEP 56 #define IMX6UL_CLK_PLL1_SW 57 #define IMX6UL_CLK_AXI_ALT_SEL 58 #define IMX6UL_CLK_AXI_SEL 59 @@ -78,7 +78,7 @@ #define IMX6UL_CLK_USDHC2_SEL 65 #define IMX6UL_CLK_BCH_SEL 66 #define IMX6UL_CLK_GPMI_SEL 67 -#define IMX6UL_CLK_EIM_SLOW_SEL 68 +#define IMX6UL_CLK_EIM_SLOW_SEL 68 #define IMX6UL_CLK_SPDIF_SEL 69 #define IMX6UL_CLK_SAI1_SEL 70 #define IMX6UL_CLK_SAI2_SEL 71 @@ -105,9 +105,9 @@ #define IMX6UL_CLK_LDB_DI1_DIV_SEL 92 #define IMX6UL_CLK_ARM 93 #define IMX6UL_CLK_PERIPH_CLK2 94 -#define IMX6UL_CLK_PERIPH2_CLK2 95 +#define IMX6UL_CLK_PERIPH2_CLK2 95 #define IMX6UL_CLK_AHB 96 -#define IMX6UL_CLK_MMDC_PODF 97 +#define IMX6UL_CLK_MMDC_PODF 97 #define IMX6UL_CLK_AXI_PODF 98 #define IMX6UL_CLK_PERCLK 99 #define IMX6UL_CLK_IPG 100 @@ -133,16 +133,16 @@ #define IMX6UL_CLK_CAN_PODF 120 #define IMX6UL_CLK_ECSPI_PODF 121 #define IMX6UL_CLK_UART_PODF 122 -#define IMX6UL_CLK_ADC1 123 -#define IMX6UL_CLK_ADC2 124 +#define IMX6UL_CLK_ADC1 123 +#define IMX6UL_CLK_ADC2 124 #define IMX6UL_CLK_AIPSTZ1 125 #define IMX6UL_CLK_AIPSTZ2 126 #define IMX6UL_CLK_AIPSTZ3 127 #define IMX6UL_CLK_APBHDMA 128 #define IMX6UL_CLK_ASRC_IPG 129 #define IMX6UL_CLK_ASRC_MEM 130 -#define IMX6UL_CLK_GPMI_BCH_APB 131 -#define IMX6UL_CLK_GPMI_BCH 132 +#define IMX6UL_CLK_GPMI_BCH_APB 131 +#define IMX6UL_CLK_GPMI_BCH 132 #define IMX6UL_CLK_GPMI_IO 133 #define IMX6UL_CLK_GPMI_APB 134 #define IMX6UL_CLK_CAAM_MEM 135 @@ -154,7 +154,7 @@ #define IMX6UL_CLK_ECSPI3 141 #define IMX6UL_CLK_ECSPI4 142 #define IMX6UL_CLK_EIM 143 -#define IMX6UL_CLK_ENET 144 +#define IMX6UL_CLK_ENET 144 #define IMX6UL_CLK_ENET_AHB 145 #define IMX6UL_CLK_EPIT1 146 #define IMX6UL_CLK_EPIT2 147 @@ -166,63 +166,63 @@ #define IMX6UL_CLK_GPT1_SERIAL 153 #define IMX6UL_CLK_GPT2_BUS 154 #define IMX6UL_CLK_GPT2_SERIAL 155 -#define IMX6UL_CLK_I2C1 156 -#define IMX6UL_CLK_I2C2 157 -#define IMX6UL_CLK_I2C3 158 -#define IMX6UL_CLK_I2C4 159 -#define IMX6UL_CLK_IOMUXC 160 -#define IMX6UL_CLK_LCDIF_APB 161 -#define IMX6UL_CLK_LCDIF_PIX 162 -#define IMX6UL_CLK_MMDC_P0_FAST 163 -#define IMX6UL_CLK_MMDC_P0_IPG 164 -#define IMX6UL_CLK_OCOTP 165 -#define IMX6UL_CLK_OCRAM 166 -#define IMX6UL_CLK_PWM1 167 -#define IMX6UL_CLK_PWM2 168 -#define IMX6UL_CLK_PWM3 169 -#define IMX6UL_CLK_PWM4 170 -#define IMX6UL_CLK_PWM5 171 -#define IMX6UL_CLK_PWM6 172 -#define IMX6UL_CLK_PWM7 173 -#define IMX6UL_CLK_PWM8 174 -#define IMX6UL_CLK_PXP 175 -#define IMX6UL_CLK_QSPI 176 -#define IMX6UL_CLK_ROM 177 -#define IMX6UL_CLK_SAI1 178 -#define IMX6UL_CLK_SAI1_IPG 179 -#define IMX6UL_CLK_SAI2 180 -#define IMX6UL_CLK_SAI2_IPG 181 -#define IMX6UL_CLK_SAI3 182 -#define IMX6UL_CLK_SAI3_IPG 183 -#define IMX6UL_CLK_SDMA 184 -#define IMX6UL_CLK_SIM 185 -#define IMX6UL_CLK_SIM_S 186 -#define IMX6UL_CLK_SPBA 187 -#define IMX6UL_CLK_SPDIF 188 -#define IMX6UL_CLK_UART1_IPG 189 -#define IMX6UL_CLK_UART1_SERIAL 190 -#define IMX6UL_CLK_UART2_IPG 191 -#define IMX6UL_CLK_UART2_SERIAL 192 -#define IMX6UL_CLK_UART3_IPG 193 -#define IMX6UL_CLK_UART3_SERIAL 194 -#define IMX6UL_CLK_UART4_IPG 195 -#define IMX6UL_CLK_UART4_SERIAL 196 -#define IMX6UL_CLK_UART5_IPG 197 -#define IMX6UL_CLK_UART5_SERIAL 198 -#define IMX6UL_CLK_UART6_IPG 199 -#define IMX6UL_CLK_UART6_SERIAL 200 -#define IMX6UL_CLK_UART7_IPG 201 -#define IMX6UL_CLK_UART7_SERIAL 202 -#define IMX6UL_CLK_UART8_IPG 203 -#define IMX6UL_CLK_UART8_SERIAL 204 -#define IMX6UL_CLK_USBOH3 205 -#define IMX6UL_CLK_USDHC1 206 -#define IMX6UL_CLK_USDHC2 207 -#define IMX6UL_CLK_WDOG1 208 -#define IMX6UL_CLK_WDOG2 209 -#define IMX6UL_CLK_WDOG3 210 +#define IMX6UL_CLK_I2C1 156 +#define IMX6UL_CLK_I2C2 157 +#define IMX6UL_CLK_I2C3 158 +#define IMX6UL_CLK_I2C4 159 +#define IMX6UL_CLK_IOMUXC 160 +#define IMX6UL_CLK_LCDIF_APB 161 +#define IMX6UL_CLK_LCDIF_PIX 162 +#define IMX6UL_CLK_MMDC_P0_FAST 163 +#define IMX6UL_CLK_MMDC_P0_IPG 164 +#define IMX6UL_CLK_OCOTP 165 +#define IMX6UL_CLK_OCRAM 166 +#define IMX6UL_CLK_PWM1 167 +#define IMX6UL_CLK_PWM2 168 +#define IMX6UL_CLK_PWM3 169 +#define IMX6UL_CLK_PWM4 170 +#define IMX6UL_CLK_PWM5 171 +#define IMX6UL_CLK_PWM6 172 +#define IMX6UL_CLK_PWM7 173 +#define IMX6UL_CLK_PWM8 174 +#define IMX6UL_CLK_PXP 175 +#define IMX6UL_CLK_QSPI 176 +#define IMX6UL_CLK_ROM 177 +#define IMX6UL_CLK_SAI1 178 +#define IMX6UL_CLK_SAI1_IPG 179 +#define IMX6UL_CLK_SAI2 180 +#define IMX6UL_CLK_SAI2_IPG 181 +#define IMX6UL_CLK_SAI3 182 +#define IMX6UL_CLK_SAI3_IPG 183 +#define IMX6UL_CLK_SDMA 184 +#define IMX6UL_CLK_SIM 185 +#define IMX6UL_CLK_SIM_S 186 +#define IMX6UL_CLK_SPBA 187 +#define IMX6UL_CLK_SPDIF 188 +#define IMX6UL_CLK_UART1_IPG 189 +#define IMX6UL_CLK_UART1_SERIAL 190 +#define IMX6UL_CLK_UART2_IPG 191 +#define IMX6UL_CLK_UART2_SERIAL 192 +#define IMX6UL_CLK_UART3_IPG 193 +#define IMX6UL_CLK_UART3_SERIAL 194 +#define IMX6UL_CLK_UART4_IPG 195 +#define IMX6UL_CLK_UART4_SERIAL 196 +#define IMX6UL_CLK_UART5_IPG 197 +#define IMX6UL_CLK_UART5_SERIAL 198 +#define IMX6UL_CLK_UART6_IPG 199 +#define IMX6UL_CLK_UART6_SERIAL 200 +#define IMX6UL_CLK_UART7_IPG 201 +#define IMX6UL_CLK_UART7_SERIAL 202 +#define IMX6UL_CLK_UART8_IPG 203 +#define IMX6UL_CLK_UART8_SERIAL 204 +#define IMX6UL_CLK_USBOH3 205 +#define IMX6UL_CLK_USDHC1 206 +#define IMX6UL_CLK_USDHC2 207 +#define IMX6UL_CLK_WDOG1 208 +#define IMX6UL_CLK_WDOG2 209 +#define IMX6UL_CLK_WDOG3 210 #define IMX6UL_CLK_LDB_DI0 211 -#define IMX6UL_CLK_AXI 212 +#define IMX6UL_CLK_AXI 212 #define IMX6UL_CLK_SPDIF_GCLK 213 #define IMX6UL_CLK_GPT_3M 214 #define IMX6UL_CLK_SIM2 215 @@ -234,7 +234,8 @@ #define IMX6UL_CLK_CSI_SEL 221 #define IMX6UL_CLK_CSI_PODF 222 #define IMX6UL_CLK_PLL3_120M 223 +#define IMX6UL_CLK_KPP 224 -#define IMX6UL_CLK_END 224 +#define IMX6UL_CLK_END 225 #endif /* __DT_BINDINGS_CLOCK_IMX6UL_H */ |