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authorEric Anholt <eric@anholt.net>2012-01-03 09:23:29 -0800
committerKeith Packard <keithp@keithp.com>2012-01-03 09:31:18 -0800
commitae662d31264979e52581bd2573bf0b82812f52ab (patch)
tree678d7f4483b6fe9a78e1ece0cb8bdefe1582dcf0 /include/drm
parente959b5db4aacc27bcf92889e658445326ebc4bfb (diff)
downloadop-kernel-dev-ae662d31264979e52581bd2573bf0b82812f52ab.zip
op-kernel-dev-ae662d31264979e52581bd2573bf0b82812f52ab.tar.gz
drm/i915: Add support for resetting the SO write pointers on gen7.
These registers are automatically incremented by the hardware during transform feedback to track where the next streamed vertex output should go. Unlike the previous generation, which had a packet for setting the corresponding registers to a defined value, gen7 only has MI_LOAD_REGISTER_IMM to do so. That's a secure packet (since it loads an arbitrary register), so we need to do it from the kernel, and it needs to be settable atomically with the batchbuffer execution so that two clients doing transform feedback don't stomp on each others' state. Instead of building a more complicated interface involcing setting the registers to a specific value, just set them to 0 when asked and userland can tweak its pointers accordingly. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/i915_drm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 1b4da1a..924f6a4 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -295,6 +295,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_COHERENT_RINGS 13
#define I915_PARAM_HAS_EXEC_CONSTANTS 14
#define I915_PARAM_HAS_RELAXED_DELTA 15
+#define I915_PARAM_HAS_GEN7_SOL_RESET 16
typedef struct drm_i915_getparam {
int param;
@@ -657,6 +658,9 @@ struct drm_i915_gem_execbuffer2 {
__u64 rsvd2;
};
+/** Resets the SO write offset registers for transform feedback on gen7. */
+#define I915_EXEC_GEN7_SOL_RESET (1<<8)
+
struct drm_i915_gem_pin {
/** Handle of the buffer to be pinned. */
__u32 handle;
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