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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-06 11:18:58 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-23 20:14:47 +0000
commit4080775b60cc26044e7c4aba5e76e5041b0d7004 (patch)
tree46ee73a35bb1c99ff7e075e1c9b441faad98dc94 /include/drm/intel-gtt.h
parent7c2e6fdf452cddeff6a8ee5156edba39e53246fc (diff)
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op-kernel-dev-4080775b60cc26044e7c4aba5e76e5041b0d7004.tar.gz
intel-gtt: export api for drm/i915
Just some minor shuffling to get rid of any agp traces in the exported functions. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm/intel-gtt.h')
-rw-r--r--include/drm/intel-gtt.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index c35817a..9e343c0 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -11,9 +11,21 @@ const struct intel_gtt {
/* Part of the gtt that is mappable by the cpu, for those chips where
* this is not the full gtt. */
unsigned int gtt_mappable_entries;
+ /* Whether i915 needs to use the dmar apis or not. */
+ unsigned int needs_dmar : 1;
} *intel_gtt_get(void);
void intel_gtt_chipset_flush(void);
+void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg);
+void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
+int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,
+ struct scatterlist **sg_list, int *num_sg);
+void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
+ unsigned int sg_len,
+ unsigned int pg_start,
+ unsigned int flags);
+void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,
+ struct page **pages, unsigned int flags);
/* Special gtt memory types */
#define AGP_DCACHE_MEMORY 1
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