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author | Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> | 2017-04-25 16:44:03 -0500 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-04-30 13:35:11 +0200 |
commit | 88d879d29f9cc0de2d930b584285638cdada6625 (patch) | |
tree | af58405562e5f6660127705861ab8ea5855d4827 /include/drm/drm_modes.h | |
parent | a5859c6d7b6114fc0e52be40f7b0f5451c4aba93 (diff) | |
download | op-kernel-dev-88d879d29f9cc0de2d930b584285638cdada6625.zip op-kernel-dev-88d879d29f9cc0de2d930b584285638cdada6625.tar.gz |
Prevent timer value 0 for MWAITX
Newer hardware has uncovered a bug in the software implementation of
using MWAITX for the delay function. A value of 0 for the timer is meant
to indicate that a timeout will not be used to exit MWAITX. On newer
hardware this can result in MWAITX never returning, resulting in NMI
soft lockup messages being printed. On older hardware, some of the other
conditions under which MWAITX can exit masked this issue. The AMD APM
does not currently document this and will be updated.
Please refer to http://marc.info/?l=kvm&m=148950623231140 for
information regarding NMI soft lockup messages on an AMD Ryzen 1800X.
This has been root-caused as a 0 passed to MWAITX causing it to wait
indefinitely.
This change has the added benefit of avoiding the unnecessary setup of
MONITORX/MWAITX when the delay value is zero.
Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Link: http://lkml.kernel.org/r/1493156643-29366-1-git-send-email-Janakarajan.Natarajan@amd.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/drm/drm_modes.h')
0 files changed, 0 insertions, 0 deletions