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| author | Ralf Baechle <ralf@linux-mips.org> | 2006-12-12 17:14:57 +0000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-13 09:27:08 -0800 |
| commit | ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9 (patch) | |
| tree | e7c12d7c486c958a5e38888b41cfcd6a558f1aff /include/asm-x86_64/cacheflush.h | |
| parent | bcd022801ee514e28c32837f0b3ce18c775f1a7b (diff) | |
| download | op-kernel-dev-ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9.zip op-kernel-dev-ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9.tar.gz | |
[PATCH] Optimize D-cache alias handling on fork
Virtually index, physically tagged cache architectures can get away
without cache flushing when forking. This patch adds a new cache
flushing function flush_cache_dup_mm(struct mm_struct *) which for the
moment I've implemented to do the same thing on all architectures
except on MIPS where it's a no-op.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64/cacheflush.h')
| -rw-r--r-- | include/asm-x86_64/cacheflush.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/cacheflush.h b/include/asm-x86_64/cacheflush.h index d32f7f5..ab1cb5c 100644 --- a/include/asm-x86_64/cacheflush.h +++ b/include/asm-x86_64/cacheflush.h @@ -7,6 +7,7 @@ /* Caches aren't brain-dead on the intel. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) |
