x86: use u32 for some lapic functions

Use u32 so 32 and 64bit have the same interface.

Andrew Morton: xen, lguest build fixes

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

3 files changed, 16 insertions, 18 deletions

diff --git a/include/asm-x86/apic_32.h b/include/asm-x86/apic_32.h
index f909e2d..649e9a6 100644
--- a/include/asm-x86/apic_32.h
+++ b/include/asm-x86/apic_32.h
@@ -51,25 +51,23 @@ extern int local_apic_timer_disabled;
 #define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
-static __inline fastcall void native_apic_write(unsigned long reg,
-						unsigned long v)
+static __inline fastcall void native_apic_write(unsigned long reg, u32 v)
 {
-	*((volatile unsigned long *)(APIC_BASE+reg)) = v;
+	*((volatile u32 *)(APIC_BASE + reg)) = v;
 }
 
-static __inline fastcall void native_apic_write_atomic(unsigned long reg,
-						       unsigned long v)
+static __inline fastcall void native_apic_write_atomic(unsigned long reg, u32 v)
 {
-	xchg((volatile unsigned long *)(APIC_BASE+reg), v);
+	(void) xchg((u32 *)(APIC_BASE + reg), v);
 }
 
-static __inline fastcall unsigned long native_apic_read(unsigned long reg)
+static __inline fastcall u32 native_apic_read(unsigned long reg)
 {
-	return *((volatile unsigned long *)(APIC_BASE+reg));
+	return *((volatile u32 *)(APIC_BASE + reg));
 }
 
 extern void apic_wait_icr_idle(void);
-extern unsigned long safe_apic_wait_icr_idle(void);
+extern u32 safe_apic_wait_icr_idle(void);
 extern int get_physical_broadcast(void);
 
 #ifdef CONFIG_X86_GOOD_APIC
diff --git a/include/asm-x86/apic_64.h b/include/asm-x86/apic_64.h
index 7bfad02..9d0c06c 100644
--- a/include/asm-x86/apic_64.h
+++ b/include/asm-x86/apic_64.h
@@ -38,14 +38,14 @@ struct pt_regs;
  * Basic functions accessing APICs.
  */
 
-static __inline void apic_write(unsigned long reg, unsigned int v)
+static __inline void apic_write(unsigned long reg, u32 v)
 {
 	*((volatile unsigned int *)(APIC_BASE+reg)) = v;
 }
 
-static __inline unsigned int apic_read(unsigned long reg)
+static __inline u32 apic_read(unsigned long reg)
 {
-	return *((volatile unsigned int *)(APIC_BASE+reg));
+	return *((volatile u32 *)(APIC_BASE+reg));
 }
 
 extern void apic_wait_icr_idle(void);
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index f59d370..19fd3e6 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -150,9 +150,9 @@ struct pv_apic_ops {
 	 * Direct APIC operations, principally for VMI.  Ideally
 	 * these shouldn't be in this interface.
 	 */
-	void (*apic_write)(unsigned long reg, unsigned long v);
-	void (*apic_write_atomic)(unsigned long reg, unsigned long v);
-	unsigned long (*apic_read)(unsigned long reg);
+	void (*apic_write)(unsigned long reg, u32 v);
+	void (*apic_write_atomic)(unsigned long reg, u32 v);
+	u32 (*apic_read)(unsigned long reg);
 	void (*setup_boot_clock)(void);
 	void (*setup_secondary_clock)(void);
 
@@ -690,17 +690,17 @@ static inline void slow_down_io(void) {
 /*
  * Basic functions accessing APICs.
  */
-static inline void apic_write(unsigned long reg, unsigned long v)
+static inline void apic_write(unsigned long reg, u32 v)
 {
 	PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
 }
 
-static inline void apic_write_atomic(unsigned long reg, unsigned long v)
+static inline void apic_write_atomic(unsigned long reg, u32 v)
 {
 	PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
 }
 
-static inline unsigned long apic_read(unsigned long reg)
+static inline u32 apic_read(unsigned long reg)
 {
 	return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
 }