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author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 11:20:03 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 11:20:03 +0200 |
commit | 96a388de5dc53a8b234b3fd41f3ae2cedc9ffd42 (patch) | |
tree | d947a467aa2da3140279617bc4b9b101640d7bf4 /include/asm-x86/processor-cyrix.h | |
parent | 27bd0c955648646abf2a353a8371d28c37bcd982 (diff) | |
download | op-kernel-dev-96a388de5dc53a8b234b3fd41f3ae2cedc9ffd42.zip op-kernel-dev-96a388de5dc53a8b234b3fd41f3ae2cedc9ffd42.tar.gz |
i386/x86_64: move headers to include/asm-x86
Move the headers to include/asm-x86 and fixup the
header install make rules
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/processor-cyrix.h')
-rw-r--r-- | include/asm-x86/processor-cyrix.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/asm-x86/processor-cyrix.h b/include/asm-x86/processor-cyrix.h new file mode 100644 index 0000000..97568ad --- /dev/null +++ b/include/asm-x86/processor-cyrix.h @@ -0,0 +1,30 @@ +/* + * NSC/Cyrix CPU indexed register access. Must be inlined instead of + * macros to ensure correct access ordering + * Access order is always 0x22 (=offset), 0x23 (=value) + * + * When using the old macros a line like + * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); + * gets expanded to: + * do { + * outb((CX86_CCR2), 0x22); + * outb((({ + * outb((CX86_CCR2), 0x22); + * inb(0x23); + * }) | 0x88), 0x23); + * } while (0); + * + * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23). + */ + +static inline u8 getCx86(u8 reg) +{ + outb(reg, 0x22); + return inb(0x23); +} + +static inline void setCx86(u8 reg, u8 data) +{ + outb(reg, 0x22); + outb(data, 0x23); +} |