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| author | David S. Miller <davem@sunset.davemloft.net> | 2007-08-08 17:11:39 -0700 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2007-08-08 17:33:45 -0700 |
| commit | 6c70b6fc7b6fc321636a014082d9e32333da1f80 (patch) | |
| tree | ff0e52bb7ba43b058b7cbb88b952fd268fbe3ad2 /include/asm-sparc64 | |
| parent | 68c9f9fd336dc7e793cecad25f8ac40ccaa7a256 (diff) | |
| download | op-kernel-dev-6c70b6fc7b6fc321636a014082d9e32333da1f80.zip op-kernel-dev-6c70b6fc7b6fc321636a014082d9e32333da1f80.tar.gz | |
[SPARC64]: Do not assume sun4v chips have load-twin/store-init support.
Check the cpu type in the OBP device tree before committing to
using the optimized Niagara memcpy and memset implementation.
If we don't recognize the cpu type, use a completely generic
version.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64')
| -rw-r--r-- | include/asm-sparc64/oplib.h | 7 | ||||
| -rw-r--r-- | include/asm-sparc64/spitfire.h | 7 | ||||
| -rw-r--r-- | include/asm-sparc64/xor.h | 6 |
3 files changed, 16 insertions, 4 deletions
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index 3f23c5d..86dc5c0 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h @@ -1,8 +1,7 @@ -/* $Id: oplib.h,v 1.14 2001/12/19 00:29:51 davem Exp $ - * oplib.h: Describes the interface and available routines in the +/* oplib.h: Describes the interface and available routines in the * Linux Prom library. * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ @@ -31,8 +30,10 @@ extern int prom_chosen_node; extern const char prom_peer_name[]; extern const char prom_compatible_name[]; extern const char prom_root_compatible[]; +extern const char prom_cpu_compatible[]; extern const char prom_finddev_name[]; extern const char prom_chosen_path[]; +extern const char prom_cpu_path[]; extern const char prom_getprop_name[]; extern const char prom_mmu_name[]; extern const char prom_callmethod_name[]; diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index 23ad8a7..cf78078 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h @@ -38,6 +38,11 @@ #define L1DCACHE_SIZE 0x4000 +#define SUN4V_CHIP_INVALID 0x00 +#define SUN4V_CHIP_NIAGARA1 0x01 +#define SUN4V_CHIP_NIAGARA2 0x02 +#define SUN4V_CHIP_UNKNOWN 0xff + #ifndef __ASSEMBLY__ enum ultra_tlb_layout { @@ -49,6 +54,8 @@ enum ultra_tlb_layout { extern enum ultra_tlb_layout tlb_type; +extern int sun4v_chip_type; + extern int cheetah_pcache_forced_on; extern void cheetah_enable_pcache(void); diff --git a/include/asm-sparc64/xor.h b/include/asm-sparc64/xor.h index 8ce3f18..a023388 100644 --- a/include/asm-sparc64/xor.h +++ b/include/asm-sparc64/xor.h @@ -63,4 +63,8 @@ static struct xor_block_template xor_block_niagara = { /* For VIS for everything except Niagara. */ #define XOR_SELECT_TEMPLATE(FASTEST) \ - (tlb_type == hypervisor ? &xor_block_niagara : &xor_block_VIS) + ((tlb_type == hypervisor && \ + (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ + &xor_block_niagara : \ + &xor_block_VIS) |
