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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-06 23:44:37 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:11:52 -0800
commitd257d5da39a78b32721ca84b2ba7f461f2f7ed7f (patch)
treeac28d377688ebe13a4d38e05f4ff65ba73d8652a /include/asm-sparc64/tsb.h
parent840aaef8db32572b6d11e0d5cb5e6efcbc812000 (diff)
downloadop-kernel-dev-d257d5da39a78b32721ca84b2ba7f461f2f7ed7f.zip
op-kernel-dev-d257d5da39a78b32721ca84b2ba7f461f2f7ed7f.tar.gz
[SPARC64]: Initial sun4v TLB miss handling infrastructure.
Things are a little tricky because, unlike sun4u, we have to: 1) do a hypervisor trap to do the TLB load. 2) do the TSB lookup calculations by hand Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/tsb.h')
-rw-r--r--include/asm-sparc64/tsb.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index 44709cd..7f3abc3 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -53,6 +53,14 @@
* kernel image, so we don't play these games for swapper_tsb access.
*/
#ifndef __ASSEMBLY__
+struct tsb_ldquad_phys_patch_entry {
+ unsigned int addr;
+ unsigned int sun4u_insn;
+ unsigned int sun4v_insn;
+};
+extern struct tsb_ldquad_phys_patch_entry __tsb_ldquad_phys_patch,
+ __tsb_ldquad_phys_patch_end;
+
struct tsb_phys_patch_entry {
unsigned int addr;
unsigned int insn;
@@ -61,9 +69,10 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
#endif
#define TSB_LOAD_QUAD(TSB, REG) \
661: ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \
- .section .tsb_phys_patch, "ax"; \
+ .section .tsb_ldquad_phys_patch, "ax"; \
.word 661b; \
ldda [TSB] ASI_QUAD_LDD_PHYS, REG; \
+ ldda [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \
.previous
#define TSB_LOAD_TAG_HIGH(TSB, REG) \
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