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author | Trond Myklebust <Trond.Myklebust@netapp.com> | 2008-03-08 11:49:24 -0500 |
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committer | Trond Myklebust <Trond.Myklebust@netapp.com> | 2008-03-08 11:49:24 -0500 |
commit | 9446389ef612096704fdf18fa79bab423d4110f0 (patch) | |
tree | 3e4fda7270be58ae176d20d318e61fb115b325b5 /include/asm-sparc64/system.h | |
parent | cdd0972945dbcb8ea24db365d9b0e100af2a27bb (diff) | |
parent | 84c6f6046c5a2189160a8f0dca8b90427bf690ea (diff) | |
download | op-kernel-dev-9446389ef612096704fdf18fa79bab423d4110f0.zip op-kernel-dev-9446389ef612096704fdf18fa79bab423d4110f0.tar.gz |
Merge commit 'origin' into devel
Diffstat (limited to 'include/asm-sparc64/system.h')
-rw-r--r-- | include/asm-sparc64/system.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index ed91a5d..53eae09 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -30,6 +30,8 @@ enum sparc_cpu { #define ARCH_SUN4C_SUN4 0 #define ARCH_SUN4 0 +extern char reboot_command[]; + /* These are here in an effort to more fully work around Spitfire Errata * #51. Essentially, if a memory barrier occurs soon after a mispredicted * branch, the chip can stop executing instructions until a trap occurs. |