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authorDavid S. Miller <davem@davemloft.net>2008-03-21 17:01:38 -0700
committerDavid S. Miller <davem@davemloft.net>2008-03-21 17:01:38 -0700
commit64658743fdd40021e3ac91e8ff260ad06578dd23 (patch)
treeda9bd83e54702156d66ae9b6d282d610376feda8 /include/asm-sparc64/spitfire.h
parent4cfea5a7dfcc2766251e50ca30271a782d5004ad (diff)
downloadop-kernel-dev-64658743fdd40021e3ac91e8ff260ad06578dd23.zip
op-kernel-dev-64658743fdd40021e3ac91e8ff260ad06578dd23.tar.gz
[SPARC64]: Remove most limitations to kernel image size.
Currently kernel images are limited to 8MB in size, and this causes problems especially when enabling features that take up a lot of kernel image space such as lockdep. The code now will align the kernel image size up to 4MB and map that many locked TLB entries. So, the only practical limitation is the number of available locked TLB entries which is 16 on Cheetah and 64 on pre-Cheetah sparc64 cpus. Niagara cpus don't actually have hw locked TLB entry support. Rather, the hypervisor transparently provides support for "locked" TLB entries since it runs with physical addressing and does the initial TLB miss processing. Fully utilizing this change requires some help from SILO, a patch for which will be submitted to the maintainer. Essentially, SILO will only currently map up to 8MB for the kernel image and that needs to be increased. Note that neither this patch nor the SILO bits will help with network booting. The openfirmware code will only map up to a certain amount of kernel image during a network boot and there isn't much we can to about that other than to implemented a layered network booting facility. Solaris has this, and calls it "wanboot" and we may implement something similar at some point. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/spitfire.h')
-rw-r--r--include/asm-sparc64/spitfire.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 63b7040..985ea7e 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -63,6 +63,8 @@ extern void cheetah_enable_pcache(void);
SPITFIRE_HIGHEST_LOCKED_TLBENT : \
CHEETAH_HIGHEST_LOCKED_TLBENT)
+extern int num_kernel_image_mappings;
+
/* The data cache is write through, so this just invalidates the
* specified line.
*/
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