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authorSam Ravnborg <sam@ravnborg.org>2008-07-27 23:00:59 +0200
committerSam Ravnborg <sam@ravnborg.org>2008-07-27 23:00:59 +0200
commita439fe51a1f8eb087c22dd24d69cebae4a3addac (patch)
treee32d1fa97a220ab598d8ab364205817c5bf2bd6f /include/asm-sparc/vac-ops.h
parent837b41b5de356aa67abb2cadb5eef3efc7776f91 (diff)
downloadop-kernel-dev-a439fe51a1f8eb087c22dd24d69cebae4a3addac.zip
op-kernel-dev-a439fe51a1f8eb087c22dd24d69cebae4a3addac.tar.gz
sparc, sparc64: use arch/sparc/include
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'include/asm-sparc/vac-ops.h')
-rw-r--r--include/asm-sparc/vac-ops.h134
1 files changed, 0 insertions, 134 deletions
diff --git a/include/asm-sparc/vac-ops.h b/include/asm-sparc/vac-ops.h
deleted file mode 100644
index d105276..0000000
--- a/include/asm-sparc/vac-ops.h
+++ /dev/null
@@ -1,134 +0,0 @@
-#ifndef _SPARC_VAC_OPS_H
-#define _SPARC_VAC_OPS_H
-
-/* vac-ops.h: Inline assembly routines to do operations on the Sparc
- * VAC (virtual address cache) for the sun4c.
- *
- * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)
- */
-
-#include <asm/sysen.h>
-#include <asm/contregs.h>
-#include <asm/asi.h>
-
-/* The SUN4C models have a virtually addressed write-through
- * cache.
- *
- * The cache tags are directly accessible through an ASI and
- * each have the form:
- *
- * ------------------------------------------------------------
- * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ |
- * ------------------------------------------------------------
- * 31 25 24 22 21 20 19 18 16 15 2 1 0
- *
- * MBZ: These bits are either unused and/or reserved and should
- * be written as zeroes.
- *
- * CONTEXT: Records the context to which this cache line belongs.
- *
- * WRITE: A copy of the writable bit from the mmu pte access bits.
- *
- * PRIV: A copy of the privileged bit from the pte access bits.
- *
- * VALID: If set, this line is valid, else invalid.
- *
- * TagID: Fourteen bits of tag ID.
- *
- * Every virtual address is seen by the cache like this:
- *
- * ----------------------------------------
- * | RESV | TagID | LINE | BYTE-in-LINE |
- * ----------------------------------------
- * 31 30 29 16 15 4 3 0
- *
- * RESV: Unused/reserved.
- *
- * TagID: Used to match the Tag-ID in that vac tags.
- *
- * LINE: Which line within the cache
- *
- * BYTE-in-LINE: Which byte within the cache line.
- */
-
-/* Sun4c VAC Tags */
-#define S4CVACTAG_CID 0x01c00000
-#define S4CVACTAG_W 0x00200000
-#define S4CVACTAG_P 0x00100000
-#define S4CVACTAG_V 0x00080000
-#define S4CVACTAG_TID 0x0000fffc
-
-/* Sun4c VAC Virtual Address */
-/* These aren't used, why bother? (Anton) */
-#if 0
-#define S4CVACVA_TID 0x3fff0000
-#define S4CVACVA_LINE 0x0000fff0
-#define S4CVACVA_BIL 0x0000000f
-#endif
-
-/* The indexing of cache lines creates a problem. Because the line
- * field of a virtual address extends past the page offset within
- * the virtual address it is possible to have what are called
- * 'bad aliases' which will create inconsistencies. So we must make
- * sure that within a context that if a physical page is mapped
- * more than once, that 'extra' line bits are the same. If this is
- * not the case, and thus is a 'bad alias' we must turn off the
- * cacheable bit in the pte's of all such pages.
- */
-
-#ifdef CONFIG_SUN4
-#define S4CVAC_BADBITS 0x0001e000
-#else
-#define S4CVAC_BADBITS 0x0000f000
-#endif
-
-/* The following is true if vaddr1 and vaddr2 would cause
- * a 'bad alias'.
- */
-#define S4CVAC_BADALIAS(vaddr1, vaddr2) \
- ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) & \
- (S4CVAC_BADBITS))
-
-/* The following structure describes the characteristics of a sun4c
- * VAC as probed from the prom during boot time.
- */
-struct sun4c_vac_props {
- unsigned int num_bytes; /* Size of the cache */
- unsigned int num_lines; /* Number of cache lines */
- unsigned int do_hwflushes; /* Hardware flushing available? */
- enum { VAC_NONE, VAC_WRITE_THROUGH,
- VAC_WRITE_BACK } type; /* What type of VAC? */
- unsigned int linesize; /* Size of each line in bytes */
- unsigned int log2lsize; /* log2(linesize) */
- unsigned int on; /* VAC is enabled */
-};
-
-extern struct sun4c_vac_props sun4c_vacinfo;
-
-/* sun4c_enable_vac() enables the sun4c virtual address cache. */
-static inline void sun4c_enable_vac(void)
-{
- __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
- "or %%g1, %2, %%g1\n\t"
- "stba %%g1, [%0] %1\n\t"
- : /* no outputs */
- : "r" ((unsigned int) AC_SENABLE),
- "i" (ASI_CONTROL), "i" (SENABLE_CACHE)
- : "g1", "memory");
- sun4c_vacinfo.on = 1;
-}
-
-/* sun4c_disable_vac() disables the virtual address cache. */
-static inline void sun4c_disable_vac(void)
-{
- __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
- "andn %%g1, %2, %%g1\n\t"
- "stba %%g1, [%0] %1\n\t"
- : /* no outputs */
- : "r" ((unsigned int) AC_SENABLE),
- "i" (ASI_CONTROL), "i" (SENABLE_CACHE)
- : "g1", "memory");
- sun4c_vacinfo.on = 0;
-}
-
-#endif /* !(_SPARC_VAC_OPS_H) */
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