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| author | Paul Mundt <lethal@linux-sh.org> | 2008-02-13 20:14:10 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-02-14 14:22:12 +0900 |
| commit | 38350e0a00f973dd9c6556beeff0f7eb5ef3f58b (patch) | |
| tree | a419a9c9b45a6cb20a2f4f809f628c10a3ce9ab9 /include/asm-sh/mmu_context_64.h | |
| parent | 5c8f82c64941594cdab53bf9f9a66c190781f4f6 (diff) | |
| download | op-kernel-dev-38350e0a00f973dd9c6556beeff0f7eb5ef3f58b.zip op-kernel-dev-38350e0a00f973dd9c6556beeff0f7eb5ef3f58b.tar.gz | |
sh: Get SH-5 caches working again post-unification.
A number of cleanups to get the SH-5 cache management code in line with
the rest of the SH backend.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/mmu_context_64.h')
| -rw-r--r-- | include/asm-sh/mmu_context_64.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-sh/mmu_context_64.h b/include/asm-sh/mmu_context_64.h index 020be74..9649f1c 100644 --- a/include/asm-sh/mmu_context_64.h +++ b/include/asm-sh/mmu_context_64.h @@ -66,6 +66,9 @@ static inline void set_asid(unsigned long asid) : "=r" (sr), "=r" (pc) : "0" (sr)); } +/* arch/sh/kernel/cpu/sh5/entry.S */ +extern unsigned long switch_and_save_asid(unsigned long new_asid); + /* No spare register to twiddle, so use a software cache */ extern pgd_t *mmu_pdtp_cache; |
