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authorPaul Mundt <lethal@linux-sh.org>2007-11-10 20:01:51 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 13:18:43 +0900
commit76168c21b78a0bd684d4687d14a2bd76bcf92762 (patch)
treed4ed090163321bc5b92494014ec8ed0e4e794d28 /include/asm-sh/cpu-sh5
parent01fed9311ab8a724283b3f456c12e573cb51d92b (diff)
downloadop-kernel-dev-76168c21b78a0bd684d4687d14a2bd76bcf92762.zip
op-kernel-dev-76168c21b78a0bd684d4687d14a2bd76bcf92762.tar.gz
sh: More SH-5 cpuinfo tidying.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh5')
-rw-r--r--include/asm-sh/cpu-sh5/cache.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh5/cache.h b/include/asm-sh/cpu-sh5/cache.h
index 2d1f9c2..7eaa889 100644
--- a/include/asm-sh/cpu-sh5/cache.h
+++ b/include/asm-sh/cpu-sh5/cache.h
@@ -19,6 +19,10 @@
#define SH_CACHE_VALID (1LL<<0)
#define SH_CACHE_UPDATED (1LL<<57)
+/* Unimplemented compat bits.. */
+#define SH_CACHE_COMBINED 0
+#define SH_CACHE_ASSOC 0
+
/* Cache flags */
#define SH_CACHE_MODE_WT (1LL<<0)
#define SH_CACHE_MODE_WB (1LL<<1)
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