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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-16 10:32:02 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-16 10:32:02 -0700 |
commit | b91cba52e9b7b3f1c0037908a192d93a869ca9e5 (patch) | |
tree | bbce7f323c8f52b308af5a152673a75b3e445360 /include/asm-sh/cpu-sh2/cache.h | |
parent | 98283bb49c6c8c070ebde9f47489d3e9a83c1323 (diff) | |
parent | e509ac4bbc661052dc73a2e8138800ba77d4ecb9 (diff) | |
download | op-kernel-dev-b91cba52e9b7b3f1c0037908a192d93a869ca9e5.zip op-kernel-dev-b91cba52e9b7b3f1c0037908a192d93a869ca9e5.tar.gz |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (68 commits)
sh: sh-rtc support for SH7709.
sh: Revert __xdiv64_32 size change.
sh: Update r7785rp defconfig.
sh: Export div symbols for GCC 4.2 and ST GCC.
sh: fix race in parallel out-of-tree build
sh: Kill off dead mach.c for hp6xx.
sh: hd64461.h cleanup and added comments.
sh: Update the alignment when 4K stacks are used.
sh: Add a .bss.page_aligned section for 4K stacks.
sh: Don't let SH-4A clobber SH-4 CFLAGS.
sh: Add parport stub for SuperIO ports.
sh: Drop -Wa,-dsp for DSP tuning.
sh: Update dreamcast defconfig.
fb: pvr2fb: A few more __devinit annotations for PCI.
fb: pvr2fb: Fix up section mismatch warnings.
sh: Select IPR-IRQ for SH7091.
sh: Correct __xdiv64_32/div64_32 return value size.
sh: Fix timer-tmu build for SH-3.
sh: Add cpu and mach links to CLEAN_FILES.
sh: Preliminary support for the SH-X3 CPU.
...
Diffstat (limited to 'include/asm-sh/cpu-sh2/cache.h')
-rw-r--r-- | include/asm-sh/cpu-sh2/cache.h | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h index 20b9796..f02ba7a 100644 --- a/include/asm-sh/cpu-sh2/cache.h +++ b/include/asm-sh/cpu-sh2/cache.h @@ -12,23 +12,7 @@ #define L1_CACHE_SHIFT 4 -#if defined(CONFIG_CPU_SUBTYPE_SH7604) -#define CCR 0xfffffe92 /* Address of Cache Control Register */ - -#define CCR_CACHE_CE 0x01 /* Cache enable */ -#define CCR_CACHE_ID 0x02 /* Instruction Replacement disable */ -#define CCR_CACHE_OD 0x04 /* Data Replacement disable */ -#define CCR_CACHE_TW 0x08 /* Two-way mode */ -#define CCR_CACHE_CP 0x10 /* Cache purge */ - -#define CACHE_OC_ADDRESS_ARRAY 0x60000000 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CP -#define CCR_CACHE_ORA CCR_CACHE_TW -#define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */ - -#elif defined(CONFIG_CPU_SUBTYPE_SH7619) +#if defined(CONFIG_CPU_SUBTYPE_SH7619) #define CCR1 0xffffffec #define CCR CCR1 @@ -49,5 +33,5 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF #endif -#endif /* __ASM_CPU_SH2_CACHE_H */ +#endif /* __ASM_CPU_SH2_CACHE_H */ |