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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-06 08:10:55 -0800
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-06 08:10:55 -0800
commitdd6a7c19e4630f635467246a81b8e0cc818c05e6 (patch)
tree8fc93cdef4070183cbd3fa06019c84728380b389 /include/asm-sh/atomic.h
parentdd8856bda5f1308beb113281b248683992998a9e (diff)
parentea0f8feaa041f3ccec3d6b8ee51325b177daef06 (diff)
downloadop-kernel-dev-dd6a7c19e4630f635467246a81b8e0cc818c05e6.zip
op-kernel-dev-dd6a7c19e4630f635467246a81b8e0cc818c05e6.tar.gz
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (43 commits) sh: sh775x/titan fixes for irq header changes. sh: update r7780rp defconfig. sh: compile fixes for header cleanup. sh: Fixup pte_mkhuge() build failure. sh: set KBUILD_IMAGE to something sensible. sh: show held locks in stack trace with lockdep. sh: platform_pata support for R7780RP sh: stacktrace/lockdep/irqflags tracing support. sh: Fixup movli.l/movco.l atomic ops for gcc4. sh: dyntick infrastructure. sh: Clock framework tidying. sh: Turn off IRQs around get_timer_offset() calls. sh: Get the PGD right in oops case with 64-bit PTEs. sh: Fix store queue bitmap end. sh: More flexible + SH7780 earlyprintk SCIF support. sh: Fixup various PAGE_SIZE == 4096 assumptions. sh: Fixup 4K irq stacks. sh: dma-api channel capability extensions. sh: Drop name overload in dma-sh. sh: Make dma-isa depend on ISA_DMA_API. ...
Diffstat (limited to 'include/asm-sh/atomic.h')
-rw-r--r--include/asm-sh/atomic.h48
1 files changed, 24 insertions, 24 deletions
diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h
index 8bdc1ba..28305c3 100644
--- a/include/asm-sh/atomic.h
+++ b/include/asm-sh/atomic.h
@@ -28,11 +28,11 @@ static inline void atomic_add(int i, atomic_t *v)
unsigned long tmp;
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_add \n"
-" add %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_add \n"
+" add %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
- : "=&z" (tmp), "=r" (&v->counter)
+ : "=&z" (tmp)
: "r" (i), "r" (&v->counter)
: "t");
#else
@@ -50,11 +50,11 @@ static inline void atomic_sub(int i, atomic_t *v)
unsigned long tmp;
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_sub \n"
-" sub %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_sub \n"
+" sub %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
- : "=&z" (tmp), "=r" (&v->counter)
+ : "=&z" (tmp)
: "r" (i), "r" (&v->counter)
: "t");
#else
@@ -80,12 +80,12 @@ static inline int atomic_add_return(int i, atomic_t *v)
#ifdef CONFIG_CPU_SH4A
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_add_return \n"
-" add %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_add_return \n"
+" add %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
" synco \n"
- : "=&z" (temp), "=r" (&v->counter)
+ : "=&z" (temp)
: "r" (i), "r" (&v->counter)
: "t");
#else
@@ -109,12 +109,12 @@ static inline int atomic_sub_return(int i, atomic_t *v)
#ifdef CONFIG_CPU_SH4A
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_sub_return \n"
-" sub %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_sub_return \n"
+" sub %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
" synco \n"
- : "=&z" (temp), "=r" (&v->counter)
+ : "=&z" (temp)
: "r" (i), "r" (&v->counter)
: "t");
#else
@@ -186,11 +186,11 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
unsigned long tmp;
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_clear_mask \n"
-" and %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_clear_mask \n"
+" and %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
- : "=&z" (tmp), "=r" (&v->counter)
+ : "=&z" (tmp)
: "r" (~mask), "r" (&v->counter)
: "t");
#else
@@ -208,11 +208,11 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
unsigned long tmp;
__asm__ __volatile__ (
-"1: movli.l @%3, %0 ! atomic_set_mask \n"
-" or %2, %0 \n"
-" movco.l %0, @%3 \n"
+"1: movli.l @%2, %0 ! atomic_set_mask \n"
+" or %1, %0 \n"
+" movco.l %0, @%2 \n"
" bf 1b \n"
- : "=&z" (tmp), "=r" (&v->counter)
+ : "=&z" (tmp)
: "r" (mask), "r" (&v->counter)
: "t");
#else
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