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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-18 21:13:20 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-18 21:13:20 +0200 |
| commit | f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c (patch) | |
| tree | c5643fcdc884a8d0bfc3f1bc28039cab7394e5bc /include/asm-powerpc/sigcontext.h | |
| parent | 323ec001c6bb98eeabb5abbdbb8c8055d9496554 (diff) | |
| parent | 5b664cb235e97afbf34db9c4d77f08ebd725335e (diff) | |
| download | op-kernel-dev-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.zip op-kernel-dev-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.tar.gz | |
Merge branch 'linus' into core/generic-dma-coherent
Conflicts:
kernel/Makefile
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-powerpc/sigcontext.h')
| -rw-r--r-- | include/asm-powerpc/sigcontext.h | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/include/asm-powerpc/sigcontext.h b/include/asm-powerpc/sigcontext.h index 165d630..9c1f24f 100644 --- a/include/asm-powerpc/sigcontext.h +++ b/include/asm-powerpc/sigcontext.h @@ -43,9 +43,44 @@ struct sigcontext { * it must be copied via a vector register to/from storage) or as a word. * The entry with index 33 contains the vrsave as the first word (offset 0) * within the quadword. + * + * Part of the VSX data is stored here also by extending vmx_restore + * by an additional 32 double words. Architecturally the layout of + * the VSR registers and how they overlap on top of the legacy FPR and + * VR registers is shown below: + * + * VSR doubleword 0 VSR doubleword 1 + * ---------------------------------------------------------------- + * VSR[0] | FPR[0] | | + * ---------------------------------------------------------------- + * VSR[1] | FPR[1] | | + * ---------------------------------------------------------------- + * | ... | | + * | ... | | + * ---------------------------------------------------------------- + * VSR[30] | FPR[30] | | + * ---------------------------------------------------------------- + * VSR[31] | FPR[31] | | + * ---------------------------------------------------------------- + * VSR[32] | VR[0] | + * ---------------------------------------------------------------- + * VSR[33] | VR[1] | + * ---------------------------------------------------------------- + * | ... | + * | ... | + * ---------------------------------------------------------------- + * VSR[62] | VR[30] | + * ---------------------------------------------------------------- + * VSR[63] | VR[31] | + * ---------------------------------------------------------------- + * + * FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63 + * is stored at the start of vmx_reserve. vmx_reserve is extended for + * backwards compatility to store VSR 0-31 doubleword 1 after the VMX + * registers and vscr/vrsave. */ elf_vrreg_t __user *v_regs; - long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; + long vmx_reserve[ELF_NVRREG+ELF_NVRREG+32+1]; #endif }; |
