summaryrefslogtreecommitdiffstats
path: root/include/asm-parisc
diff options
context:
space:
mode:
authorKyle McMartin <kyle@parisc-linux.org>2006-08-24 21:33:40 -0400
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 06:50:16 -0600
commit08a6436816f7a16113c73be767ee8d50440e494e (patch)
tree158c7aba479931fb8182905151fcd0258990b9bf /include/asm-parisc
parent983daeec99f07fca0a8a9180ba1ca65bbd40c820 (diff)
downloadop-kernel-dev-08a6436816f7a16113c73be767ee8d50440e494e.zip
op-kernel-dev-08a6436816f7a16113c73be767ee8d50440e494e.tar.gz
[PARISC] Add support for Quicksilver AGPGART
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/agp.h25
-rw-r--r--include/asm-parisc/ropes.h12
2 files changed, 37 insertions, 0 deletions
diff --git a/include/asm-parisc/agp.h b/include/asm-parisc/agp.h
new file mode 100644
index 0000000..9f61d4e
--- /dev/null
+++ b/include/asm-parisc/agp.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_PARISC_AGP_H
+#define _ASM_PARISC_AGP_H
+
+/*
+ * PARISC specific AGP definitions.
+ * Copyright (c) 2006 Kyle McMartin <kyle@parisc-linux.org>
+ *
+ */
+
+#define map_page_into_agp(page) /* nothing */
+#define unmap_page_from_agp(page) /* nothing */
+#define flush_agp_mappings() /* nothing */
+#define flush_agp_cache() mb()
+
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
+#endif /* _ASM_PARISC_AGP_H */
diff --git a/include/asm-parisc/ropes.h b/include/asm-parisc/ropes.h
index 2e3de0a..5542dd0 100644
--- a/include/asm-parisc/ropes.h
+++ b/include/asm-parisc/ropes.h
@@ -1,6 +1,8 @@
#ifndef _ASM_PARISC_ROPES_H_
#define _ASM_PARISC_ROPES_H_
+#include <asm-parisc/parisc-device.h>
+
#ifdef CONFIG_64BIT
/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
#define ZX1_SUPPORT
@@ -231,6 +233,16 @@ static inline int IS_QUICKSILVER(struct parisc_device *d) {
return (d->id.hversion == QUICKSILVER_HVERS);
}
+static inline int agp_mode_mercury(void __iomem *hpa) {
+ u64 bus_mode;
+
+ bus_mode = readl(hpa + 0x0620);
+ if (bus_mode & 1)
+ return 1;
+
+ return 0;
+}
+
/*
** I/O SAPIC init function
** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
OpenPOWER on IntegriCloud