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authorMatthew Wilcox <matthew@wil.cx>2006-08-28 11:53:30 -0600
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 06:47:03 -0600
commit136ce40e9f1f24ca1dbf7714c669a7bca56440ea (patch)
treec628ca029dc7f3829ebb52c403fba467b6faa804 /include/asm-parisc/serial.h
parent75a4958154f5d0028d5464f2479b4297d55cf4a3 (diff)
downloadop-kernel-dev-136ce40e9f1f24ca1dbf7714c669a7bca56440ea.zip
op-kernel-dev-136ce40e9f1f24ca1dbf7714c669a7bca56440ea.tar.gz
[PARISC] Clean up asm-parisc/serial.h
Russell King pointed out that asm/serial.h is anachronistic and we were misusing BASE_BAUD. So fix BASE_BAUD for PCI 16550 UARTs, move LASI_BASE_BAUD into 8250_gsc, and fix the obsolete comment about reserving serial port slots. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/serial.h')
-rw-r--r--include/asm-parisc/serial.h16
1 files changed, 2 insertions, 14 deletions
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
index 82fd820..d7e3cc6 100644
--- a/include/asm-parisc/serial.h
+++ b/include/asm-parisc/serial.h
@@ -3,20 +3,8 @@
*/
/*
- * This assumes you have a 7.272727 MHz clock for your UART.
- * The documentation implies a 40Mhz clock, and elsewhere a 7Mhz clock
- * Clarified: 7.2727MHz on LASI. Not yet clarified for DINO
+ * This is used for 16550-compatible UARTs
*/
+#define BASE_BAUD ( 1843200 / 16 )
-#define LASI_BASE_BAUD ( 7272727 / 16 )
-#define BASE_BAUD LASI_BASE_BAUD
-
-/*
- * We don't use the ISA probing code, so these entries are just to reserve
- * space. Some example (maximal) configurations:
- * - 712 w/ additional Lasi & RJ16 ports: 4
- * - J5k w/ PCI serial cards: 2 + 4 * card ~= 34
- * A500 w/ PCI serial cards: 5 + 4 * card ~= 17
- */
-
#define SERIAL_PORT_DFNS
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