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author | David S. Miller <davem@davemloft.net> | 2009-04-13 14:41:05 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2009-04-13 14:41:05 -0700 |
commit | 83400207a07584539366f6859362db6872809a12 (patch) | |
tree | fad187f8b3bebf1b387ec42ef8143e6f4e49a256 /include/asm-mn10300/proc-mn103e010/cache.h | |
parent | 0d489ffb76de0fe804cf06a9d4d11fa7342d74b9 (diff) | |
parent | 80a04d3f2f94fb68b5df05e3ac6697130bc3467a (diff) | |
download | op-kernel-dev-83400207a07584539366f6859362db6872809a12.zip op-kernel-dev-83400207a07584539366f6859362db6872809a12.tar.gz |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts:
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Diffstat (limited to 'include/asm-mn10300/proc-mn103e010/cache.h')
-rw-r--r-- | include/asm-mn10300/proc-mn103e010/cache.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h deleted file mode 100644 index bdc1f9a..0000000 --- a/include/asm-mn10300/proc-mn103e010/cache.h +++ /dev/null @@ -1,33 +0,0 @@ -/* MN103E010 Cache specification - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ -#ifndef _ASM_PROC_CACHE_H -#define _ASM_PROC_CACHE_H - -/* L1 cache */ - -#define L1_CACHE_NWAYS 4 /* number of ways in caches */ -#define L1_CACHE_NENTRIES 256 /* number of entries in each way */ -#define L1_CACHE_BYTES 16 /* bytes per entry */ -#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */ -#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */ - -#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */ -#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ -#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */ -#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ - -/* - * specification of the interval between interrupt checking intervals whilst - * managing the cache with the interrupts disabled - */ -#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4 - -#endif /* _ASM_PROC_CACHE_H */ |