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authorRalf Baechle <ralf@linux-mips.org>2007-11-24 22:33:28 +0000
committerRalf Baechle <ralf@linux-mips.org>2007-11-26 17:26:14 +0000
commit940f6b48a130e0a33cb8bd397dd0e277166470ad (patch)
tree03bd36fcb9b5c8d77f5de2930ff32d770f5cdf4e /include/asm-mips
parent5aa85c9fc49a6ce44dc10a42e2011bbde9dc445a (diff)
downloadop-kernel-dev-940f6b48a130e0a33cb8bd397dd0e277166470ad.zip
op-kernel-dev-940f6b48a130e0a33cb8bd397dd0e277166470ad.tar.gz
[MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors systems where there is on guarantee that the counter are synchronized or running from the same clock at all. This broke Sibyte and probably others since the "[MIPS] Handle R4000/R4400 mfc0 from count register." commit. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/time.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 1922494..7717934 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -67,6 +67,17 @@ static inline int mips_clockevent_init(void)
}
#endif
+/*
+ * Initialize the count register as a clocksource
+ */
+#ifdef CONFIG_CEVT_R4K
+extern void init_mips_clocksource(void);
+#else
+static inline void init_mips_clocksource(void)
+{
+}
+#endif
+
extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
extern void clockevent_set_clock(struct clock_event_device *cd,
unsigned int clock);
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