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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-21 15:05:58 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-21 15:05:58 +0200 |
| commit | 1c29dd9a9e2f83ffb02e50bb3619c3b9db8fd526 (patch) | |
| tree | b5691dd5aa48ac32fdbaef44afcbcc92f01592d3 /include/asm-mips/txx9/rbtx4927.h | |
| parent | 32172561889868c0ea422ea8570f0413963a815f (diff) | |
| parent | 14b395e35d1afdd8019d11b92e28041fad591b71 (diff) | |
| download | op-kernel-dev-1c29dd9a9e2f83ffb02e50bb3619c3b9db8fd526.zip op-kernel-dev-1c29dd9a9e2f83ffb02e50bb3619c3b9db8fd526.tar.gz | |
Merge branch 'linus' into x86/paravirt-spinlocks
Diffstat (limited to 'include/asm-mips/txx9/rbtx4927.h')
| -rw-r--r-- | include/asm-mips/txx9/rbtx4927.h | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h index bf19458..6fcec91 100644 --- a/include/asm-mips/txx9/rbtx4927.h +++ b/include/asm-mips/txx9/rbtx4927.h @@ -34,7 +34,23 @@ #define RBTX4927_PCIIO 0x16000000 #define RBTX4927_PCIIO_SIZE 0x01000000 -#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL) +#define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) +#define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) +#define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000) +#define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002) +#define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006) +#define RBTX4927_BRAMRTC_BASE (IO_BASE + TXX9_CE(2) + 0x00010000) +#define RBTX4927_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000) + +/* Ethernet port address */ +#define RBTX4927_ETHER_ADDR (RBTX4927_ETHER_BASE + 0x280) + +#define rbtx4927_imask_addr ((__u8 __iomem *)RBTX4927_IMASK_ADDR) +#define rbtx4927_imstat_addr ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR) +#define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR) +#define rbtx4927_softresetlock_addr \ + ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR) +#define rbtx4927_pcireset_addr ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR) /* bits for ISTAT/IMASK/IMSTAT */ #define RBTX4927_INTB_PCID 0 @@ -62,13 +78,7 @@ #define RBTX4927_ISA_IO_OFFSET 0 #endif -#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL -#define RBTX4927_SW_RESET_DO_SET 0x01 - -#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL -#define RBTX4927_SW_RESET_ENABLE_SET 0x01 - -#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET) +#define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base) #define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3)) void rbtx4927_prom_init(void); |
