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authorRalf Baechle <ralf@linux-mips.org>2006-09-25 15:49:49 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-09-27 13:37:57 +0100
commit36396f3c36b04f79438f87a0fccfa76aa3de6af9 (patch)
tree2e9e26d7ace9005502014a1e624a34792f5be925 /include/asm-mips/sibyte
parente584ade1a6679bfb417620f15951796bed9805d9 (diff)
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[MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sibyte')
-rw-r--r--include/asm-mips/sibyte/sb1250_defs.h6
-rw-r--r--include/asm-mips/sibyte/sb1250_scd.h2
2 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
index 335dbaf..a885491 100644
--- a/include/asm-mips/sibyte/sb1250_defs.h
+++ b/include/asm-mips/sibyte/sb1250_defs.h
@@ -212,7 +212,7 @@
* Note: you'll need to define uint32_t and uint64_t in your headers.
*/
-#if !defined(__ASSEMBLER__)
+#if !defined(__ASSEMBLY__)
#define _SB_MAKE64(x) ((uint64_t)(x))
#define _SB_MAKE32(x) ((uint32_t)(x))
#else
@@ -251,9 +251,9 @@
*/
-#if defined(__mips64) && !defined(__ASSEMBLER__)
+#if defined(__mips64) && !defined(__ASSEMBLY__)
#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
#endif
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index f4178bd..7ed0bb6 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -149,7 +149,7 @@
* (For the assembler version, sysrev and dest may be the same register.
* Also, it clobbers AT.)
*/
-#ifdef __ASSEMBLER__
+#ifdef __ASSEMBLY__
#define SYS_SOC_TYPE(dest, sysrev) \
.set push ; \
.set reorder ; \
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