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| author | Jeff Garzik <jgarzik@pobox.com> | 2005-10-30 01:58:41 -0500 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-10-30 01:58:41 -0500 |
| commit | fce45c1c8a6b5334fa88bbb9b1496b0699d3fef0 (patch) | |
| tree | cba2597077cf33d122f8d771bf84618cc5374cf6 /include/asm-mips/pgtable-bits.h | |
| parent | 15dbb5a3f971a28040ae6cbcd8bbdf19b629fa83 (diff) | |
| parent | 81cfb8864c73230eb1c37753aba517db15cf4d8f (diff) | |
| download | op-kernel-dev-fce45c1c8a6b5334fa88bbb9b1496b0699d3fef0.zip op-kernel-dev-fce45c1c8a6b5334fa88bbb9b1496b0699d3fef0.tar.gz | |
Merge branch 'upstream'
Diffstat (limited to 'include/asm-mips/pgtable-bits.h')
| -rw-r--r-- | include/asm-mips/pgtable-bits.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 3aad751..01e76e9 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h @@ -33,7 +33,7 @@ * unpredictable things. The code (when it is written) to deal with * this problem will be in the update_mmu_cache() code for the r4k. */ -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define _PAGE_PRESENT (1<<6) /* implemented in software */ #define _PAGE_READ (1<<7) /* implemented in software */ @@ -123,7 +123,7 @@ #endif #endif -#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */ +#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */ #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) @@ -140,7 +140,7 @@ #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW #endif -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3) #else #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9) |
