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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-01-08 02:14:29 +0900
committerRalf Baechle <ralf@linux-mips.org>2007-02-06 16:53:08 +0000
commit97dcb82de6cc99a5669eb8e342efc24cceb1e77e (patch)
treee195fd57deda8d38652c746c04a7c374cdf951a0 /include/asm-mips/mach-emma2rh
parentb6ec8f069bf202d2bd888aa9137b2cc3aad4c573 (diff)
downloadop-kernel-dev-97dcb82de6cc99a5669eb8e342efc24cceb1e77e.zip
op-kernel-dev-97dcb82de6cc99a5669eb8e342efc24cceb1e77e.tar.gz
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-emma2rh')
-rw-r--r--include/asm-mips/mach-emma2rh/irq.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-mips/mach-emma2rh/irq.h b/include/asm-mips/mach-emma2rh/irq.h
index bce6424..5439eb8 100644
--- a/include/asm-mips/mach-emma2rh/irq.h
+++ b/include/asm-mips/mach-emma2rh/irq.h
@@ -10,4 +10,6 @@
#define NR_IRQS 256
+#include_next <irq.h>
+
#endif /* __ASM_MACH_EMMA2RH_IRQ_H */
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