diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-07-01 16:10:40 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:35 +0100 |
commit | a5fc9c0bbee8b91025993a49a9176a88380aef3c (patch) | |
tree | e68ee45e852028ddde712abb18531777dba6e468 /include/asm-mips/dec | |
parent | 7d7ee221213609319401d1b9d6dc4bf22ab928ea (diff) | |
download | op-kernel-dev-a5fc9c0bbee8b91025993a49a9176a88380aef3c.zip op-kernel-dev-a5fc9c0bbee8b91025993a49a9176a88380aef3c.tar.gz |
Use physical addresses at the interface level, letting drivers remap
them as appropriate.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/dec')
-rw-r--r-- | include/asm-mips/dec/ioasic_addrs.h | 3 | ||||
-rw-r--r-- | include/asm-mips/dec/kn01.h | 14 | ||||
-rw-r--r-- | include/asm-mips/dec/kn02.h | 14 | ||||
-rw-r--r-- | include/asm-mips/dec/kn02xa.h | 22 | ||||
-rw-r--r-- | include/asm-mips/dec/kn03.h | 13 | ||||
-rw-r--r-- | include/asm-mips/dec/kn05.h | 3 | ||||
-rw-r--r-- | include/asm-mips/dec/system.h | 18 | ||||
-rw-r--r-- | include/asm-mips/dec/tc.h | 10 |
8 files changed, 37 insertions, 60 deletions
diff --git a/include/asm-mips/dec/ioasic_addrs.h b/include/asm-mips/dec/ioasic_addrs.h index 5e18a75..4cbc1f8 100644 --- a/include/asm-mips/dec/ioasic_addrs.h +++ b/include/asm-mips/dec/ioasic_addrs.h @@ -45,7 +45,8 @@ /* - * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)). + * Offsets for I/O ASIC registers + * (relative to (dec_kn_slot_base + IOASIC_IOCTL)). */ /* all systems */ #define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */ diff --git a/include/asm-mips/dec/kn01.h b/include/asm-mips/dec/kn01.h index 607a385..eb522aa 100644 --- a/include/asm-mips/dec/kn01.h +++ b/include/asm-mips/dec/kn01.h @@ -13,9 +13,7 @@ #ifndef __ASM_MIPS_DEC_KN01_H #define __ASM_MIPS_DEC_KN01_H -#include <asm/addrspace.h> - -#define KN01_SLOT_BASE CKSEG1ADDR(0x10000000) +#define KN01_SLOT_BASE 0x10000000 #define KN01_SLOT_SIZE 0x01000000 /* @@ -41,17 +39,9 @@ /* - * Some port addresses... - */ -#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */ -#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */ -#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */ - - -/* * Frame buffer memory address. */ -#define KN01_VFB_MEM CKSEG1ADDR(0x0fc00000) +#define KN01_VFB_MEM 0x0fc00000 /* * CPU interrupt bits. diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h index 83a042e..8319ad7 100644 --- a/include/asm-mips/dec/kn02.h +++ b/include/asm-mips/dec/kn02.h @@ -13,11 +13,7 @@ #ifndef __ASM_MIPS_DEC_KN02_H #define __ASM_MIPS_DEC_KN02_H -#include <asm/addrspace.h> -#include <asm/dec/ecc.h> - - -#define KN02_SLOT_BASE CKSEG1ADDR(0x1fc00000) +#define KN02_SLOT_BASE 0x1fc00000 #define KN02_SLOT_SIZE 0x00080000 /* @@ -34,14 +30,6 @@ /* - * Some port addresses... - */ -#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */ -#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */ -#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */ - - -/* * System Control & Status Register bits. */ #define KN02_CSR_RES_28 (0xf<<28) /* unused */ diff --git a/include/asm-mips/dec/kn02xa.h b/include/asm-mips/dec/kn02xa.h index 3c25a33..a25f3d7 100644 --- a/include/asm-mips/dec/kn02xa.h +++ b/include/asm-mips/dec/kn02xa.h @@ -17,31 +17,23 @@ #ifndef __ASM_MIPS_DEC_KN02XA_H #define __ASM_MIPS_DEC_KN02XA_H -#include <asm/addrspace.h> #include <asm/dec/ioasic_addrs.h> -#define KN02XA_SLOT_BASE CKSEG1ADDR(0x1c000000) - -/* - * Some port addresses... - */ -#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */ - +#define KN02XA_SLOT_BASE 0x1c000000 /* * Memory control ASIC registers. */ -#define KN02XA_MER CKSEG1ADDR(0x0c400000) /* memory error register */ -#define KN02XA_MSR CKSEG1ADDR(0x0c800000) /* memory size register */ +#define KN02XA_MER 0x0c400000 /* memory error register */ +#define KN02XA_MSR 0x0c800000 /* memory size register */ /* * CPU control ASIC registers. */ -#define KN02XA_MEM_CONF CKSEG1ADDR(0x0e000000) /* write timeout config */ -#define KN02XA_EAR CKSEG1ADDR(0x0e000004) /* error address register */ -#define KN02XA_BOOT0 CKSEG1ADDR(0x0e000008) /* boot 0 register */ -#define KN02XA_MEM_INTR CKSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ +#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */ +#define KN02XA_EAR 0x0e000004 /* error address register */ +#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */ +#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */ /* * Memory Error Register bits, common definitions. diff --git a/include/asm-mips/dec/kn03.h b/include/asm-mips/dec/kn03.h index 9d787cc..edede92 100644 --- a/include/asm-mips/dec/kn03.h +++ b/include/asm-mips/dec/kn03.h @@ -10,24 +10,15 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki */ #ifndef __ASM_MIPS_DEC_KN03_H #define __ASM_MIPS_DEC_KN03_H -#include <asm/addrspace.h> #include <asm/dec/ecc.h> #include <asm/dec/ioasic_addrs.h> -#define KN03_SLOT_BASE CKSEG1ADDR(0x1f800000) - -/* - * Some port addresses... - */ -#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */ -#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */ - +#define KN03_SLOT_BASE 0x1f800000 /* * CPU interrupt bits. diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h index 61feac3..15fe8f8 100644 --- a/include/asm-mips/dec/kn05.h +++ b/include/asm-mips/dec/kn05.h @@ -21,7 +21,6 @@ #ifndef __ASM_MIPS_DEC_KN05_H #define __ASM_MIPS_DEC_KN05_H -#include <asm/addrspace.h> #include <asm/dec/ioasic_addrs.h> /* @@ -30,7 +29,7 @@ * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA. * Others are handled locally. "Low" slots are always passed. */ -#define KN4K_SLOT_BASE KSEG1ADDR(0x1fc00000) +#define KN4K_SLOT_BASE 0x1fc00000 #define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */ #define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */ diff --git a/include/asm-mips/dec/system.h b/include/asm-mips/dec/system.h new file mode 100644 index 0000000..78af51f --- /dev/null +++ b/include/asm-mips/dec/system.h @@ -0,0 +1,18 @@ +/* + * include/asm-mips/dec/system.h + * + * Generic DECstation/DECsystem bits. + * + * Copyright (C) 2005 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_DEC_SYSTEM_H +#define __ASM_DEC_SYSTEM_H + +extern unsigned long dec_kn_slot_base, dec_kn_slot_size; + +#endif /* __ASM_DEC_SYSTEM_H */ diff --git a/include/asm-mips/dec/tc.h b/include/asm-mips/dec/tc.h index d7bba43..9cb51f2 100644 --- a/include/asm-mips/dec/tc.h +++ b/include/asm-mips/dec/tc.h @@ -7,10 +7,8 @@ * * Copyright (c) 1998 Harald Koerfgen */ -#ifndef ASM_TC_H -#define ASM_TC_H - -extern unsigned long system_base; +#ifndef __ASM_DEC_TC_H +#define __ASM_DEC_TC_H /* * Search for a TURBOchannel Option Module @@ -36,8 +34,8 @@ extern unsigned long get_tc_base_addr(int); */ extern unsigned long get_tc_irq_nr(int); /* - * Return TURBOchannel clock frequency in hz + * Return TURBOchannel clock frequency in Hz */ extern unsigned long get_tc_speed(void); -#endif +#endif /* __ASM_DEC_TC_H */ |