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authorFuxin Zhang <zhangfx@lemote.com>2007-06-06 14:52:43 +0800
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 17:33:02 +0100
commit2a21c7300b53b744d16903256a172d9cbcfdd03e (patch)
tree6a6f186fc7d4ab51fdda628a42f1fa845f189b8b /include/asm-mips/cpu.h
parentfee578fad1a29e6a149659e5467aedcae6897c06 (diff)
downloadop-kernel-dev-2a21c7300b53b744d16903256a172d9cbcfdd03e.zip
op-kernel-dev-2a21c7300b53b744d16903256a172d9cbcfdd03e.tar.gz
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu.h')
-rw-r--r--include/asm-mips/cpu.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 49c1f00..a362395 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -89,6 +89,8 @@
#define PRID_IMP_34K 0x9500
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
+#define PRID_IMP_LOONGSON1 0x4200
+#define PRID_IMP_LOONGSON2 0x6300
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -211,7 +213,10 @@
#define CPU_SB1A 62
#define CPU_74K 63
#define CPU_R14000 64
-#define CPU_LAST 64
+#define CPU_LOONGSON1 65
+#define CPU_LOONGSON2 66
+
+#define CPU_LAST 66
/*
* ISA Level encodings
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