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authorAndreas Mohr <andi@lisas.de>2006-06-26 18:35:02 +0200
committerAdrian Bunk <bunk@stusta.de>2006-06-26 18:35:02 +0200
commitd6e05edc59ecd79e8badf440c0d295a979bdfa3e (patch)
tree50362161f69317242ab603c51a18a818a4c93285 /include/asm-m32r
parentf18190bd3407554ba6df30a1927e07e6cba93e56 (diff)
downloadop-kernel-dev-d6e05edc59ecd79e8badf440c0d295a979bdfa3e.zip
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spelling fixes
acquired (aquired) contiguous (contigious) successful (succesful, succesfull) surprise (suprise) whether (weather) some other misspellings Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'include/asm-m32r')
-rw-r--r--include/asm-m32r/system.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index 33567e8b..66c4742f 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -318,7 +318,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
* does not enforce ordering, since there is no data dependency between
* the read of "a" and the read of "b". Therefore, on some CPUs, such
* as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
- * in cases like thiswhere there are no data dependencies.
+ * in cases like this where there are no data dependencies.
**/
#define read_barrier_depends() do { } while (0)
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