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authorJan Beulich <jbeulich@novell.com>2006-01-06 00:11:49 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 08:33:34 -0800
commitd43c6e8083ac8baeb1a167510aea34fcef396e33 (patch)
tree45feb3824511d67330bb5d2e5451fa5f66dd7542 /include/asm-i386/bugs.h
parente43d674f44dc885a2476cab3537e639d9eaa31a9 (diff)
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[PATCH] i386: move SIMD initialization
Move some code unrelated to any dealing with hardware bugs from i386's bugs.h to a more logical place. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/bugs.h')
-rw-r--r--include/asm-i386/bugs.h23
1 files changed, 1 insertions, 22 deletions
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index ea54540..50233e0 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -8,9 +8,6 @@
* <rreilova@ececs.uc.edu>
* - Channing Corn (tests & fixes),
* - Andrew D. Balsa (code cleanup).
- *
- * Pentium III FXSR, SSE support
- * Gareth Hughes <gareth@valinux.com>, May 2000
*/
/*
@@ -76,25 +73,7 @@ static void __init check_fpu(void)
return;
}
-/* Enable FXSR and company _before_ testing for FP problems. */
- /*
- * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
- */
- if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
- extern void __buggy_fxsr_alignment(void);
- __buggy_fxsr_alignment();
- }
- if (cpu_has_fxsr) {
- printk(KERN_INFO "Enabling fast FPU save and restore... ");
- set_in_cr4(X86_CR4_OSFXSR);
- printk("done.\n");
- }
- if (cpu_has_xmm) {
- printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
- set_in_cr4(X86_CR4_OSXMMEXCPT);
- printk("done.\n");
- }
-
+/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
/* Test for the divl bug.. */
__asm__("fninit\n\t"
"fldl %1\n\t"
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