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| author | Robin Getz <robin.getz@analog.com> | 2007-08-03 18:07:17 +0800 |
|---|---|---|
| committer | Bryan Wu <bryan.wu@analog.com> | 2007-08-03 18:07:17 +0800 |
| commit | f16295e7e7f2a2a15876f570f10d6dc8f1f36ab8 (patch) | |
| tree | 71481c3d4ec249dddb6f16fe765a474a0d8b2fa9 /include/asm-blackfin/mach-bf548 | |
| parent | b99ab54d4f11141b2ef3e50c3543b7243d3f49fb (diff) | |
| download | op-kernel-dev-f16295e7e7f2a2a15876f570f10d6dc8f1f36ab8.zip op-kernel-dev-f16295e7e7f2a2a15876f570f10d6dc8f1f36ab8.tar.gz | |
Blackfin arch: Fix CCLK and SCLK checks
Fix CCLK and SCLK checks, combine all arch checks into one file
for maintance. Checkins that remove more lines than they add are always
good.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf548')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/bf548.h | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h index 9498313..50306a8 100644 --- a/include/asm-blackfin/mach-bf548/bf548.h +++ b/include/asm-blackfin/mach-bf548/bf548.h @@ -106,93 +106,6 @@ #define AMGCTLVAL (V_AMBEN | V_AMCKEN) -#define MAX_VC 650000000 -#define MIN_VC 50000000 - -/********************************PLL Settings **************************************/ -#ifdef CONFIG_BFIN_KERNEL_CLOCK -#if (CONFIG_VCO_MULT < 0) -#error "VCO Multiplier is less than 0. Please select a different value" -#endif - -#if (CONFIG_VCO_MULT == 0) -#error "VCO Multiplier should be greater than 0. Please select a different value" -#endif - -#if (CONFIG_VCO_MULT > 64) -#error "VCO Multiplier is more than 64. Please select a different value" -#endif - -#ifndef CONFIG_CLKIN_HALF -#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) -#else -#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2) -#endif - -#ifndef CONFIG_PLL_BYPASS -#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV) -#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV) -#else -#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ -#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ -#endif - -#if (CONFIG_SCLK_DIV < 1) -#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" -#endif - -#if (CONFIG_SCLK_DIV > 15) -#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" -#endif - -#if (CONFIG_CCLK_DIV != 1) -#if (CONFIG_CCLK_DIV != 2) -#if (CONFIG_CCLK_DIV != 4) -#if (CONFIG_CCLK_DIV != 8) -#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value" -#endif -#endif -#endif -#endif - -#if (CONFIG_VCO_HZ > MAX_VC) -#error "VCO selected is more than maximum value. Please change the VCO multipler" -#endif - -#if (CONFIG_SCLK_HZ > 133000000) -#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier" -#endif - -#if (CONFIG_SCLK_HZ < 27000000) -#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier" -#endif - -#if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ) -#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) -#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ) -#error "Please select sclk less than cclk" -#endif -#endif -#endif - -#if (CONFIG_CCLK_DIV == 1) -#define CONFIG_CCLK_ACT_DIV CCLK_DIV1 -#endif -#if (CONFIG_CCLK_DIV == 2) -#define CONFIG_CCLK_ACT_DIV CCLK_DIV2 -#endif -#if (CONFIG_CCLK_DIV == 4) -#define CONFIG_CCLK_ACT_DIV CCLK_DIV4 -#endif -#if (CONFIG_CCLK_DIV == 8) -#define CONFIG_CCLK_ACT_DIV CCLK_DIV8 -#endif -#ifndef CONFIG_CCLK_ACT_DIV -#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly -#endif - -#endif /* CONFIG_BFIN_KERNEL_CLOCK */ - #ifdef CONFIG_BF542 #define CPU "BF542" #define CPUID 0x027c8000 |
