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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-01-13 21:30:48 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-01-13 21:30:48 +0000 |
| commit | fa0fe48fcca9ea7f8c13e21d2646bbaa1747d183 (patch) | |
| tree | 803a155f42d989ad15d3dc74389dfa6277a78895 /include/asm-arm/hardware | |
| parent | 5ff3fd27161127cc464fc04548d58672a6a8272a (diff) | |
| download | op-kernel-dev-fa0fe48fcca9ea7f8c13e21d2646bbaa1747d183.zip op-kernel-dev-fa0fe48fcca9ea7f8c13e21d2646bbaa1747d183.tar.gz | |
[ARM] Separate VIC (vectored interrupt controller) support from Versatile
Other machines may wish to make use of the VIC support code, so
move it to arch/arm/common.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/hardware')
| -rw-r--r-- | include/asm-arm/hardware/vic.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h new file mode 100644 index 0000000..81825eb --- /dev/null +++ b/include/asm-arm/hardware/vic.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/hardware/vic.h + * + * Copyright (c) ARM Limited 2003. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_HARDWARE_VIC_H +#define __ASM_ARM_HARDWARE_VIC_H + +#define VIC_IRQ_STATUS 0x00 +#define VIC_FIQ_STATUS 0x04 +#define VIC_RAW_STATUS 0x08 +#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ +#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ +#define VIC_INT_ENABLE_CLEAR 0x14 +#define VIC_INT_SOFT 0x18 +#define VIC_INT_SOFT_CLEAR 0x1c +#define VIC_PROTECT 0x20 +#define VIC_VECT_ADDR 0x30 +#define VIC_DEF_VECT_ADDR 0x34 + +#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ +#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ +#define VIC_ITCR 0x300 /* VIC test control register */ + +#define VIC_VECT_CNTL_ENABLE (1 << 5) + +#ifndef __ASSEMBLY__ +void vic_init(void __iomem *base, u32 vic_sources); +#endif + +#endif |
