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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-07-15 15:44:51 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-07-15 15:44:51 +1000 |
| commit | 43d2548bb2ef7e6d753f91468a746784041e522d (patch) | |
| tree | 77d13fcd48fd998393abb825ec36e2b732684a73 /include/asm-arm/assembler.h | |
| parent | 585583d95c5660973bc0cf64add517b040acd8a4 (diff) | |
| parent | 85082fd7cbe3173198aac0eb5e85ab1edcc6352c (diff) | |
| download | op-kernel-dev-43d2548bb2ef7e6d753f91468a746784041e522d.zip op-kernel-dev-43d2548bb2ef7e6d753f91468a746784041e522d.tar.gz | |
Merge commit '85082fd7cbe3173198aac0eb5e85ab1edcc6352c' into test-build
Manual fixup of:
arch/powerpc/Kconfig
Diffstat (limited to 'include/asm-arm/assembler.h')
| -rw-r--r-- | include/asm-arm/assembler.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index fce8328..911393b 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -56,6 +56,21 @@ #endif /* + * This can be used to enable code to cacheline align the destination + * pointer when bulk writing to memory. Experiments on StrongARM and + * XScale didn't show this a worthwhile thing to do when the cache is not + * set to write-allocate (this would need further testing on XScale when WA + * is used). + * + * On Feroceon there is much to gain however, regardless of cache mode. + */ +#ifdef CONFIG_CPU_FEROCEON +#define CALGN(code...) code +#else +#define CALGN(code...) +#endif + +/* * Enable and disable interrupts */ #if __LINUX_ARM_ARCH__ >= 6 |
